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mpc8xx/fec.c: Fix GCC 4.6 build warnings
Fix: fec.c: In function 'fec_pin_init': fec.c:381:18: warning: variable 'fecp' set but not used [-Wunused-but-set-variable] fec.c: In function 'fec8xx_miiphy_write': fec.c:1013:8: warning: variable 'rdreg' set but not used [-Wunused-but-set-variable] Note: The code was slightly rearranged, but no functional changes attempted, i. e. no conversion to use I/O accessors. Signed-off-by: Wolfgang Denk <wd@denx.de>
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a9a62af1f9
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1 changed files with 25 additions and 22 deletions
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@ -378,6 +378,23 @@ static void fec_pin_init(int fecidx)
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{
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{
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bd_t *bd = gd->bd;
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bd_t *bd = gd->bd;
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
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/*
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* Set MII speed to 2.5 MHz or slightly below.
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*
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* According to the MPC860T (Rev. D) Fast ethernet controller user
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* manual (6.2.14),
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* the MII management interface clock must be less than or equal
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* to 2.5 MHz.
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* This MDC frequency is equal to system clock / (2 * MII_SPEED).
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* Then MII_SPEED = system_clock / 2 * 2,5 MHz.
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*
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* All MII configuration is done via FEC1 registers:
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*/
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immr->im_cpm.cp_fec1.fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
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#if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE) || defined(CONFIG_NETTA2)
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{
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volatile fec_t *fecp;
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volatile fec_t *fecp;
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/*
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/*
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@ -391,22 +408,9 @@ static void fec_pin_init(int fecidx)
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else
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else
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fecp = &immr->im_cpm.cp_fec2;
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fecp = &immr->im_cpm.cp_fec2;
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/*
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* Set MII speed to 2.5 MHz or slightly below.
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* * According to the MPC860T (Rev. D) Fast ethernet controller user
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* * manual (6.2.14),
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* * the MII management interface clock must be less than or equal
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* * to 2.5 MHz.
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* * This MDC frequency is equal to system clock / (2 * MII_SPEED).
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* * Then MII_SPEED = system_clock / 2 * 2,5 MHz.
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*
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* All MII configuration is done via FEC1 registers:
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*/
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immr->im_cpm.cp_fec1.fec_mii_speed = ((bd->bi_intfreq + 4999999) / 5000000) << 1;
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#if defined(CONFIG_NETTA) || defined(CONFIG_NETPHONE) || defined(CONFIG_NETTA2)
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/* our PHYs are the limit at 2.5 MHz */
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/* our PHYs are the limit at 2.5 MHz */
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fecp->fec_mii_speed <<= 1;
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fecp->fec_mii_speed <<= 1;
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}
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#endif
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#endif
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#if defined(CONFIG_MPC885_FAMILY) && defined(WANT_MII)
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#if defined(CONFIG_MPC885_FAMILY) && defined(WANT_MII)
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@ -1010,11 +1014,10 @@ int fec8xx_miiphy_read(const char *devname, unsigned char addr,
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int fec8xx_miiphy_write(const char *devname, unsigned char addr,
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int fec8xx_miiphy_write(const char *devname, unsigned char addr,
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unsigned char reg, unsigned short value)
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unsigned char reg, unsigned short value)
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{
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{
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short rdreg; /* register working value */
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#ifdef MII_DEBUG
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#ifdef MII_DEBUG
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printf ("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
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printf ("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
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#endif
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#endif
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rdreg = mii_send(mk_mii_write(addr, reg, value));
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(void)mii_send(mk_mii_write(addr, reg, value));
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#ifdef MII_DEBUG
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#ifdef MII_DEBUG
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printf ("0x%04x\n", value);
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printf ("0x%04x\n", value);
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