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https://github.com/Fishwaldo/u-boot.git
synced 2025-03-21 14:41:31 +00:00
net: emaclite: Setup RX/TX ping pong for every instance
Setup RX/TX ping-pong buffer for every emaclite IP separately. The next patch move initialization directly to board code. Signed-off-by: Michal Simek <monstr@monstr.eu>
This commit is contained in:
parent
7bf5228ce1
commit
947324b9ca
1 changed files with 68 additions and 55 deletions
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@ -66,6 +66,8 @@
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struct xemaclite {
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struct xemaclite {
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u32 nexttxbuffertouse; /* Next TX buffer to write to */
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u32 nexttxbuffertouse; /* Next TX buffer to write to */
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u32 nextrxbuffertouse; /* Next RX buffer to read from */
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u32 nextrxbuffertouse; /* Next RX buffer to read from */
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u32 txpp; /* TX ping pong buffer */
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u32 rxpp; /* RX ping pong buffer */
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};
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};
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static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
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static u32 etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
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@ -131,6 +133,7 @@ static void emaclite_halt(struct eth_device *dev)
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static int emaclite_init(struct eth_device *dev, bd_t *bis)
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static int emaclite_init(struct eth_device *dev, bd_t *bis)
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{
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{
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struct xemaclite *emaclite = dev->priv;
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debug ("EmacLite Initialization Started\n");
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debug ("EmacLite Initialization Started\n");
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/*
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/*
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@ -150,28 +153,28 @@ static int emaclite_init(struct eth_device *dev, bd_t *bis)
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XEL_TSR_PROG_MAC_ADDR) != 0)
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XEL_TSR_PROG_MAC_ADDR) != 0)
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;
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;
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#ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
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if (emaclite->txpp) {
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/* The same operation with PONG TX */
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/* The same operation with PONG TX */
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out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);
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out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);
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xemaclite_alignedwrite(dev->enetaddr, dev->iobase +
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xemaclite_alignedwrite(dev->enetaddr, dev->iobase +
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XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH);
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XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH);
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out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
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out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
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out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET,
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out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET,
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XEL_TSR_PROG_MAC_ADDR);
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XEL_TSR_PROG_MAC_ADDR);
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while ((in_be32 (dev->iobase + XEL_TSR_OFFSET +
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while ((in_be32 (dev->iobase + XEL_TSR_OFFSET +
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XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0)
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XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0)
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;
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;
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#endif
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}
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/*
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/*
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* RX - RX_PING & RX_PONG initialization
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* RX - RX_PING & RX_PONG initialization
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*/
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*/
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/* Write out the value to flush the RX buffer */
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/* Write out the value to flush the RX buffer */
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out_be32 (dev->iobase + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK);
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out_be32 (dev->iobase + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK);
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#ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
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out_be32 (dev->iobase + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET,
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if (emaclite->rxpp)
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XEL_RSR_RECV_IE_MASK);
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out_be32 (dev->iobase + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET,
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#endif
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XEL_RSR_RECV_IE_MASK);
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debug ("EmacLite Initialization complete\n");
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debug ("EmacLite Initialization complete\n");
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return 0;
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return 0;
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@ -221,10 +224,10 @@ static int emaclite_send (struct eth_device *dev, volatile void *ptr, int len)
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printf ("Error: Timeout waiting for ethernet TX buffer\n");
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printf ("Error: Timeout waiting for ethernet TX buffer\n");
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/* Restart PING TX */
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/* Restart PING TX */
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out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
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out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
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#ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
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if (emaclite->txpp) {
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out_be32 (dev->iobase + XEL_TSR_OFFSET +
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out_be32 (dev->iobase + XEL_TSR_OFFSET +
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XEL_BUFFER_OFFSET, 0);
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XEL_BUFFER_OFFSET, 0);
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#endif
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}
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return -1;
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return -1;
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}
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}
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@ -237,9 +240,9 @@ static int emaclite_send (struct eth_device *dev, volatile void *ptr, int len)
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&& ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
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&& ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
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& XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
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& XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
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#ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
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if (emaclite->txpp)
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emaclite->nexttxbuffertouse ^= XEL_BUFFER_OFFSET;
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emaclite->nexttxbuffertouse ^= XEL_BUFFER_OFFSET;
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#endif
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debug ("Send packet from 0x%x\n", baseaddress);
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debug ("Send packet from 0x%x\n", baseaddress);
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/* Write the frame to the buffer */
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/* Write the frame to the buffer */
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xemaclite_alignedwrite ((void *) ptr, baseaddress, len);
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xemaclite_alignedwrite ((void *) ptr, baseaddress, len);
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@ -253,28 +256,30 @@ static int emaclite_send (struct eth_device *dev, volatile void *ptr, int len)
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out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
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out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
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return 0;
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return 0;
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}
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}
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#ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
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/* Switch to second buffer */
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if (emaclite->txpp) {
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baseaddress ^= XEL_BUFFER_OFFSET;
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/* Switch to second buffer */
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/* Determine if the expected buffer address is empty */
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baseaddress ^= XEL_BUFFER_OFFSET;
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reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
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/* Determine if the expected buffer address is empty */
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if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
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&& ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
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& XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
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debug("Send packet from 0x%x\n", baseaddress);
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/* Write the frame to the buffer */
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xemaclite_alignedwrite ((void *) ptr, baseaddress, len);
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out_be32 (baseaddress + XEL_TPLR_OFFSET,(len &
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(XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO)));
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reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
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reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
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reg |= XEL_TSR_XMIT_BUSY_MASK;
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if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0)
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if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) {
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&& ((in_be32 ((baseaddress) + XEL_TSR_OFFSET)
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reg |= XEL_TSR_XMIT_ACTIVE_MASK;
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& XEL_TSR_XMIT_ACTIVE_MASK) == 0)) {
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debug("Send packet from 0x%x\n", baseaddress);
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/* Write the frame to the buffer */
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xemaclite_alignedwrite((void *) ptr, baseaddress, len);
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out_be32 (baseaddress + XEL_TPLR_OFFSET, (len &
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(XEL_TPLR_LENGTH_MASK_HI |
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XEL_TPLR_LENGTH_MASK_LO)));
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reg = in_be32 (baseaddress + XEL_TSR_OFFSET);
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reg |= XEL_TSR_XMIT_BUSY_MASK;
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if ((reg & XEL_TSR_XMIT_IE_MASK) != 0)
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reg |= XEL_TSR_XMIT_ACTIVE_MASK;
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out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
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return 0;
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}
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}
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out_be32 (baseaddress + XEL_TSR_OFFSET, reg);
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return 0;
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}
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}
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#endif
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puts ("Error while sending frame\n");
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puts ("Error while sending frame\n");
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return -1;
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return -1;
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}
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}
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@ -290,23 +295,24 @@ static int emaclite_recv(struct eth_device *dev)
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reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
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reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
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debug ("Testing data at address 0x%x\n", baseaddress);
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debug ("Testing data at address 0x%x\n", baseaddress);
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if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
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if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
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#ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
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if (emaclite->rxpp)
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emaclite->nextrxbuffertouse ^= XEL_BUFFER_OFFSET;
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emaclite->nextrxbuffertouse ^= XEL_BUFFER_OFFSET;
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#endif
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} else {
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} else {
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#ifndef CONFIG_XILINX_EMACLITE_RX_PING_PONG
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debug ("No data was available - address 0x%x\n", baseaddress);
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if (!emaclite->rxpp) {
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return 0;
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#else
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baseaddress ^= XEL_BUFFER_OFFSET;
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reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
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if ((reg & XEL_RSR_RECV_DONE_MASK) !=
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XEL_RSR_RECV_DONE_MASK) {
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debug ("No data was available - address 0x%x\n",
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debug ("No data was available - address 0x%x\n",
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baseaddress);
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baseaddress);
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return 0;
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return 0;
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} else {
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baseaddress ^= XEL_BUFFER_OFFSET;
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reg = in_be32 (baseaddress + XEL_RSR_OFFSET);
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if ((reg & XEL_RSR_RECV_DONE_MASK) !=
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XEL_RSR_RECV_DONE_MASK) {
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debug("No data was available - address 0x%x\n",
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baseaddress);
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return 0;
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}
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}
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}
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#endif
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}
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}
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/* Get the length of the frame that arrived */
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/* Get the length of the frame that arrived */
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switch(((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC))) &
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switch(((ntohl(in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC))) &
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@ -358,6 +364,13 @@ int xilinx_emaclite_initialize (bd_t *bis, int base_addr)
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dev->priv = emaclite;
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dev->priv = emaclite;
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#ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
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emaclite->txpp = 1;
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#endif
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#ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
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emaclite->rxpp = 1;
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#endif
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sprintf(dev->name, "Xelite.%x", base_addr);
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sprintf(dev->name, "Xelite.%x", base_addr);
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dev->iobase = base_addr;
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dev->iobase = base_addr;
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