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imx: Make imx25 compatible to mxc_gpio driver and fix in tx25
Adding support for mxc_gpio driver for imx25 and fix names of registers in tx25 board. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
This commit is contained in:
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23210d8e1b
commit
95d185894b
3 changed files with 26 additions and 15 deletions
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@ -86,8 +86,8 @@ struct esdramc_regs {
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/* GPIO registers */
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/* GPIO registers */
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struct gpio_regs {
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struct gpio_regs {
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u32 dr; /* data */
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u32 gpio_dr; /* data */
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u32 dir; /* direction */
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u32 gpio_dir; /* direction */
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u32 psr; /* pad satus */
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u32 psr; /* pad satus */
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u32 icr1; /* interrupt config 1 */
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u32 icr1; /* interrupt config 1 */
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u32 icr2; /* interrupt config 2 */
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u32 icr2; /* interrupt config 2 */
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@ -357,4 +357,10 @@ struct aips_regs {
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#define WSR_UNLOCK1 0x5555
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#define WSR_UNLOCK1 0x5555
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#define WSR_UNLOCK2 0xAAAA
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#define WSR_UNLOCK2 0xAAAA
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/* Names used in GPIO driver */
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#define GPIO1_BASE_ADDR IMX_GPIO1_BASE
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#define GPIO2_BASE_ADDR IMX_GPIO2_BASE
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#define GPIO3_BASE_ADDR IMX_GPIO3_BASE
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#define GPIO4_BASE_ADDR IMX_GPIO4_BASE
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#endif /* _IMX_REGS_H */
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#endif /* _IMX_REGS_H */
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@ -70,18 +70,18 @@ void tx25_fec_init(void)
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writel(0x0, &padctl->pad_d11);
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writel(0x0, &padctl->pad_d11);
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/* drop PHY power and assert reset (low) */
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/* drop PHY power and assert reset (low) */
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val = readl(&gpio4->dr) & ~((1 << 7) | (1 << 9));
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val = readl(&gpio4->gpio_dr) & ~((1 << 7) | (1 << 9));
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writel(val, &gpio4->dr);
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writel(val, &gpio4->gpio_dr);
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val = readl(&gpio4->dir) | (1 << 7) | (1 << 9);
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val = readl(&gpio4->gpio_dir) | (1 << 7) | (1 << 9);
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writel(val, &gpio4->dir);
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writel(val, &gpio4->gpio_dir);
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mdelay(5);
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mdelay(5);
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debug("resetting phy\n");
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debug("resetting phy\n");
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/* turn on PHY power leaving reset asserted */
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/* turn on PHY power leaving reset asserted */
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val = readl(&gpio4->dr) | 1 << 9;
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val = readl(&gpio4->gpio_dr) | 1 << 9;
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writel(val, &gpio4->dr);
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writel(val, &gpio4->gpio_dr);
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mdelay(10);
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mdelay(10);
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@ -111,19 +111,19 @@ void tx25_fec_init(void)
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/*
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/*
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* set each to 1 and make each an output
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* set each to 1 and make each an output
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*/
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*/
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val = readl(&gpio3->dr) | (1 << 10) | (1 << 11) | (1 << 12);
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val = readl(&gpio3->gpio_dr) | (1 << 10) | (1 << 11) | (1 << 12);
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writel(val, &gpio3->dr);
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writel(val, &gpio3->gpio_dr);
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val = readl(&gpio3->dir) | (1 << 10) | (1 << 11) | (1 << 12);
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val = readl(&gpio3->gpio_dir) | (1 << 10) | (1 << 11) | (1 << 12);
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writel(val, &gpio3->dir);
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writel(val, &gpio3->gpio_dir);
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mdelay(22); /* this value came from RedBoot */
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mdelay(22); /* this value came from RedBoot */
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/*
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/*
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* deassert PHY reset
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* deassert PHY reset
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*/
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*/
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val = readl(&gpio4->dr) | 1 << 7;
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val = readl(&gpio4->gpio_dr) | 1 << 7;
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writel(val, &gpio4->dr);
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writel(val, &gpio4->gpio_dr);
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writel(val, &gpio4->dr);
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writel(val, &gpio4->gpio_dr);
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mdelay(5);
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mdelay(5);
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@ -24,6 +24,11 @@
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#ifndef __MXC_GPIO_H
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#ifndef __MXC_GPIO_H
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#define __MXC_GPIO_H
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#define __MXC_GPIO_H
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/* Converts a GPIO port number and the internal bit position
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* to the GPIO number
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*/
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#define MXC_GPIO_PORT_TO_NUM(port, bit) (((port - 1) << 5) + (bit & 0x1f))
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enum mxc_gpio_direction {
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enum mxc_gpio_direction {
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MXC_GPIO_DIRECTION_IN,
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MXC_GPIO_DIRECTION_IN,
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MXC_GPIO_DIRECTION_OUT,
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MXC_GPIO_DIRECTION_OUT,
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