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8610HPCD: Fix typos in two PCI setup registers.

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The two symbols MPC86xx_PORDEVSR_IO_SEL and MPC86xx_PORBMSR_HA
were erroneously present as 85xx names and values, leftover from
the clone wars.  Fix this by removing the 85xx cruft from the
86xx codebase.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
This commit is contained in:
Jon Loeliger 2008-02-19 12:31:08 -06:00
parent 13f5433f70
commit 975a083a5e
2 changed files with 2 additions and 5 deletions
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5
board/freescale/mpc8610hpcd/mpc8610hpcd.c
View file

@ -280,13 +280,12 @@ void pci_init_board(void)
volatile immap_t *immap = (immap_t *) CFG_CCSRBAR; volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur; volatile ccsr_gur_t *gur = &immap->im_gur;
uint devdisr = gur->devdisr; uint devdisr = gur->devdisr;
uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 19;
uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16; uint host_agent = (gur->porbmsr & MPC86xx_PORBMSR_HA) >> 16;
printf( " pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n", printf( " pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n",
devdisr, io_sel, host_agent); devdisr, io_sel, host_agent);
#ifdef CONFIG_PCIE1 #ifdef CONFIG_PCIE1
{ {
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE1_ADDR; volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE1_ADDR;

2
include/asm-ppc/immap_86xx.h
View file

@ -1257,11 +1257,9 @@ typedef struct ccsr_gur {
uint porpllsr; /* 0xe0000 - POR PLL ratio status register */ uint porpllsr; /* 0xe0000 - POR PLL ratio status register */
uint porbmsr; /* 0xe0004 - POR boot mode status register */ uint porbmsr; /* 0xe0004 - POR boot mode status register */
#define MPC86xx_PORBMSR_HA 0x00060000 #define MPC86xx_PORBMSR_HA 0x00060000
#define MPC85xx_PORBMSR_HA 0x00070000
uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */ uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */
uint pordevsr; /* 0xe000c - POR I/O device status regsiter */ uint pordevsr; /* 0xe000c - POR I/O device status regsiter */
#define MPC86xx_PORDEVSR_IO_SEL 0x000F0000 #define MPC86xx_PORDEVSR_IO_SEL 0x000F0000
#define MPC85xx_PORDEVSR_IO_SEL 0x00380000 /* 85xx platform type */
#define MPC86xx_PORDEVSR_CORE1TE 0x00000080 /* ASMP (Core1 addr trans) */ #define MPC86xx_PORDEVSR_CORE1TE 0x00000080 /* ASMP (Core1 addr trans) */
uint pordbgmsr; /* 0xe0010 - POR debug mode status register */ uint pordbgmsr; /* 0xe0010 - POR debug mode status register */
char res1[12]; char res1[12];