mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-06-29 18:11:43 +00:00
ppc4xx: Add SPL support
This patch adds SPL booting support (NOR flash) for the PPC4xx platforms. This SPL booting (Falcon mode) will be used by the upcoming lcd4_lwmon5 board port (lwmon5 variant). Signed-off-by: Stefan Roese <sr@denx.de>
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parent
d10f68ae47
commit
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5 changed files with 185 additions and 4 deletions
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@ -68,6 +68,10 @@ COBJS += miiphy.o
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COBJS += uic.o
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COBJS += uic.o
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endif
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endif
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ifdef CONFIG_SPL_BUILD
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COBJS-y += spl_boot.o
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endif
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y))
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y))
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START := $(addprefix $(obj),$(START))
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START := $(addprefix $(obj),$(START))
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72
arch/powerpc/cpu/ppc4xx/spl_boot.c
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72
arch/powerpc/cpu/ppc4xx/spl_boot.c
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@ -0,0 +1,72 @@
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/*
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* Copyright (C) 2013 Stefan Roese <sr@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <spl.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Return selected boot device. On PPC4xx its only NOR flash right now.
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*/
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_NOR;
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}
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/*
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* SPL version of board_init_f()
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*/
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void board_init_f(ulong bootflag)
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{
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/*
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* First we need to initialize the SDRAM, so that the real
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* U-Boot or the OS (Linux) can be loaded
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*/
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initdram(0);
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/* Clear bss */
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memset(__bss_start, '\0', __bss_end - __bss_start);
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/*
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* Init global_data pointer. Has to be done before calling
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* get_clocks(), as it stores some clock values into gd needed
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* later on in the serial driver.
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*/
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/* Pointer is writable since we allocated a register for it */
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gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
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/* Clear initial global data */
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memset((void *)gd, 0, sizeof(gd_t));
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/*
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* get_clocks() needs to be called so that the serial driver
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* works correctly
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*/
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get_clocks();
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/*
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* Do rudimental console / serial setup
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*/
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preloader_console_init();
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/*
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* Call board_init_r() (SPL framework version) to load and boot
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* real U-Boot or OS
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*/
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board_init_r(NULL, 0);
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/* Does not return!!! */
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}
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@ -232,7 +232,7 @@
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*
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*
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* Use r12 to access the GOT
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* Use r12 to access the GOT
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*/
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*/
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#if !defined(CONFIG_NAND_SPL)
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#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
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START_GOT
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START_GOT
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GOT_ENTRY(_GOT2_TABLE_)
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GOT_ENTRY(_GOT2_TABLE_)
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GOT_ENTRY(_FIXUP_TABLE_)
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GOT_ENTRY(_FIXUP_TABLE_)
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@ -248,7 +248,8 @@
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END_GOT
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END_GOT
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#endif /* CONFIG_NAND_SPL */
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#endif /* CONFIG_NAND_SPL */
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#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
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#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \
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!defined(CONFIG_SPL_BUILD)
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/*
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/*
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* NAND U-Boot image is started from offset 0
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* NAND U-Boot image is started from offset 0
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*/
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*/
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@ -270,6 +271,18 @@
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bl _start_440
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bl _start_440
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#endif
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#endif
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#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
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/*
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* This is the entry of the real U-Boot from a board port
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* that supports SPL booting on the PPC4xx. We only need
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* to call board_init_f() here. Everything else has already
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* been done in the SPL u-boot version.
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*/
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GET_GOT /* initialize GOT access */
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bl board_init_f /* run 1st part of board init code (in Flash)*/
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/* NOTREACHED - board_init_f() does not return */
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#endif
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/*
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/*
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* 440 Startup -- on reset only the top 4k of the effective
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* 440 Startup -- on reset only the top 4k of the effective
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* address space is mapped in by an entry in the instruction
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* address space is mapped in by an entry in the instruction
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@ -539,7 +552,7 @@ tlbnx2: addi r4,r4,1 /* Next TLB */
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* r3 - 1st arg to board_init(): IMMP pointer
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* r3 - 1st arg to board_init(): IMMP pointer
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* r4 - 2nd arg to board_init(): boot flag
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* r4 - 2nd arg to board_init(): boot flag
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*/
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*/
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#ifndef CONFIG_NAND_SPL
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#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
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.text
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.text
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.long 0x27051956 /* U-Boot Magic Number */
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.long 0x27051956 /* U-Boot Magic Number */
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.globl version_string
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.globl version_string
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@ -612,6 +625,18 @@ _end_of_vectors:
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.globl _start
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.globl _start
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_start:
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_start:
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#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
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/*
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* This is the entry of the real U-Boot from a board port
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* that supports SPL booting on the PPC4xx. We only need
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* to call board_init_f() here. Everything else has already
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* been done in the SPL u-boot version.
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*/
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GET_GOT /* initialize GOT access */
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bl board_init_f /* run 1st part of board init code (in Flash)*/
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/* NOTREACHED - board_init_f() does not return */
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#endif
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/*****************************************************************************/
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/*****************************************************************************/
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#if defined(CONFIG_440)
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#if defined(CONFIG_440)
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@ -796,7 +821,9 @@ _start:
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#ifdef CONFIG_NAND_SPL
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#ifdef CONFIG_NAND_SPL
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bl nand_boot_common /* will not return */
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bl nand_boot_common /* will not return */
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#else
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#else
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#ifndef CONFIG_SPL_BUILD
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GET_GOT
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GET_GOT
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#endif
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bl cpu_init_f /* run low-level CPU init code (from Flash) */
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bl cpu_init_f /* run low-level CPU init code (from Flash) */
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bl board_init_f
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bl board_init_f
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@ -1080,7 +1107,7 @@ _start:
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/*----------------------------------------------------------------------- */
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/*----------------------------------------------------------------------- */
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#ifndef CONFIG_NAND_SPL
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#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
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/*
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/*
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* This code finishes saving the registers to the exception frame
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* This code finishes saving the registers to the exception frame
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* and jumps to the appropriate handler for the exception.
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* and jumps to the appropriate handler for the exception.
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@ -1262,6 +1289,7 @@ in32r:
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lwbrx r3,r0,r3
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lwbrx r3,r0,r3
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blr
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blr
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#if !defined(CONFIG_SPL_BUILD)
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/*
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/*
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* void relocate_code (addr_sp, gd, addr_moni)
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* void relocate_code (addr_sp, gd, addr_moni)
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*
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*
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@ -1626,6 +1654,7 @@ __440_msr_continue:
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mtlr r4 /* restore link register */
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mtlr r4 /* restore link register */
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blr
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blr
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#endif /* CONFIG_SPL_BUILD */
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#if defined(CONFIG_440)
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#if defined(CONFIG_440)
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/*----------------------------------------------------------------------------+
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/*----------------------------------------------------------------------------+
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74
arch/powerpc/cpu/ppc4xx/u-boot-spl.lds
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74
arch/powerpc/cpu/ppc4xx/u-boot-spl.lds
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@ -0,0 +1,74 @@
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/*
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* Copyright 2012-2013 Stefan Roese <sr@denx.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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MEMORY
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{
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sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR,
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LENGTH = CONFIG_SPL_BSS_MAX_SIZE
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flash : ORIGIN = CONFIG_SPL_TEXT_BASE,
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LENGTH = CONFIG_SYS_SPL_MAX_LEN
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}
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OUTPUT_ARCH(powerpc)
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ENTRY(_start)
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SECTIONS
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{
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#ifdef CONFIG_440
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.bootpg 0xfffff000 :
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{
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arch/powerpc/cpu/ppc4xx/start.o (.bootpg)
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/*
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* PPC440 board need a board specific object with the
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* TLB definitions. This needs to get included right after
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* start.o, since the first shadow TLB only covers 4k
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* of address space.
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*/
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CONFIG_BOARDDIR/init.o (.bootpg)
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} > flash
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#endif
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.resetvec 0xFFFFFFFC :
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{
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KEEP(*(.resetvec))
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} > flash
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.text :
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{
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__start = .;
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arch/powerpc/cpu/ppc4xx/start.o (.text)
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CONFIG_BOARDDIR/init.o (.text)
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*(.text*)
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} > flash
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. = ALIGN(4);
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.data : { *(SORT_BY_ALIGNMENT(.data*)) } > flash
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. = ALIGN(4);
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.rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } > flash
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.bss :
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{
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. = ALIGN(4);
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__bss_start = .;
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*(.bss*)
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. = ALIGN(4);
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__bss_end = .;
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} > sdram
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}
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@ -96,6 +96,7 @@ SECTIONS
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. = ALIGN(256);
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. = ALIGN(256);
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__init_end = .;
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__init_end = .;
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#ifndef CONFIG_SPL
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#ifdef CONFIG_440
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#ifdef CONFIG_440
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.bootpg RESET_VECTOR_ADDRESS - 0xffc :
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.bootpg RESET_VECTOR_ADDRESS - 0xffc :
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{
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{
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@ -132,6 +133,7 @@ SECTIONS
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#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
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#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
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. |= 0x10;
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. |= 0x10;
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#endif
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#endif
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#endif /* CONFIG_SPL */
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__bss_start = .;
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__bss_start = .;
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.bss (NOLOAD) :
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.bss (NOLOAD) :
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