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socfpga: initialize designware ethernet

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Enable initialization fo designware ethernet controller. With this
patch, ethernet works in my configuration, provided I set ethernet
address in the environment.

Signed-off-by: Pavel Machek <pavel@denx.de>
This commit is contained in:
Pavel Machek 2014-07-14 14:14:17 +02:00 • committed by Tom Rini
parent 3ab019e1dc
commit 99b97106f3
4 changed files with 51 additions and 9 deletions
Download patch file Download diff file Expand all files Collapse all files

17
arch/arm/cpu/armv7/socfpga/misc.c
View file

@ -6,6 +6,8 @@
#include <common.h> #include <common.h>
#include <asm/io.h> #include <asm/io.h>
#include <miiphy.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -38,3 +40,18 @@ int misc_init_r(void)
{ {
return 0; return 0;
} }
/*
* DesignWare Ethernet initialization
*/
int cpu_eth_init(bd_t *bis)
{
#if !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) && !defined(CONFIG_SPL_BUILD)
/* initialize and register the emac */
return designware_initialize(CONFIG_EMAC_BASE,
CONFIG_PHY_INTERFACE_MODE);
#else
return 0;
#endif
}

2
arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
View file

@ -16,5 +16,7 @@
#define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000 #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
#define SOCFPGA_SCANMGR_ADDRESS 0xfff02000 #define SOCFPGA_SCANMGR_ADDRESS 0xfff02000
#define SOCFPGA_EMAC0_ADDRESS 0xff700000
#define SOCFPGA_EMAC1_ADDRESS 0xff702000
#endif /* _SOCFPGA_BASE_ADDRS_H_ */ #endif /* _SOCFPGA_BASE_ADDRS_H_ */

9
board/altera/socfpga/socfpga_cyclone5.c
View file

@ -37,12 +37,3 @@ int board_init(void)
icache_enable(); icache_enable();
return 0; return 0;
} }
/*
* DesignWare Ethernet initialization
*/
/* We know all the init functions have been run now */
int board_eth_init(bd_t *bis)
{
return 0;
}

32
include/configs/socfpga_cyclone5.h
View file

@ -207,6 +207,38 @@
#define CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_IS_NOWHERE
/*
* network support
*/
#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
#define CONFIG_DESIGNWARE_ETH 1
#endif
#ifdef CONFIG_DESIGNWARE_ETH
#define CONFIG_EMAC0_BASE SOCFPGA_EMAC0_ADDRESS
#define CONFIG_EMAC1_BASE SOCFPGA_EMAC1_ADDRESS
/* console support for network */
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
/* designware */
#define CONFIG_NET_MULTI
#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_DW_SEARCH_PHY
#define CONFIG_MII
#define CONFIG_PHY_GIGE
#define CONFIG_DW_AUTONEG
#define CONFIG_AUTONEG_TIMEOUT (15 * CONFIG_SYS_HZ)
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021
/* EMAC controller and PHY used */
#define CONFIG_EMAC_BASE CONFIG_EMAC1_BASE
#define CONFIG_EPHY_PHY_ADDR CONFIG_EPHY1_PHY_ADDR
#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
#endif /* CONFIG_DESIGNWARE_ETH */
/* /*
* L4 Watchdog * L4 Watchdog
*/ */