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drivers: spi:ti_qspi: change ti_qspi_slave to ti_qspi_priv for driver model conversion
Changing the ti_qspi_priv structure and its instance names from to priv for driver mode conversion. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
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parent
ec712f490d
commit
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1 changed files with 60 additions and 60 deletions
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@ -85,8 +85,8 @@ struct ti_qspi_regs {
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u32 data3;
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u32 data3;
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};
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};
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/* ti qspi slave */
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/* ti qspi priv */
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struct ti_qspi_slave {
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struct ti_qspi_priv {
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struct spi_slave slave;
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struct spi_slave slave;
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struct ti_qspi_regs *base;
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struct ti_qspi_regs *base;
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unsigned int mode;
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unsigned int mode;
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@ -94,14 +94,14 @@ struct ti_qspi_slave {
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u32 dc;
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u32 dc;
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};
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};
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static inline struct ti_qspi_slave *to_ti_qspi_slave(struct spi_slave *slave)
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static inline struct ti_qspi_priv *to_ti_qspi_priv(struct spi_slave *slave)
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{
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{
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return container_of(slave, struct ti_qspi_slave, slave);
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return container_of(slave, struct ti_qspi_priv, slave);
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}
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}
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static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave)
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static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv)
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{
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{
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struct spi_slave *slave = &qslave->slave;
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struct spi_slave *slave = &priv->slave;
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u32 memval = 0;
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u32 memval = 0;
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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@ -123,12 +123,12 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave)
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QSPI_NUM_DUMMY_BITS;
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QSPI_NUM_DUMMY_BITS;
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#endif
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#endif
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writel(memval, &qslave->base->setup0);
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writel(memval, &priv->base->setup0);
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}
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}
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static void ti_spi_set_speed(struct spi_slave *slave, uint hz)
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static void ti_spi_set_speed(struct spi_slave *slave, uint hz)
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{
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{
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struct ti_qspi_slave *qslave = to_ti_qspi_slave(slave);
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struct ti_qspi_priv *priv = to_ti_qspi_priv(slave);
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uint clk_div;
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uint clk_div;
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debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div);
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debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div);
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@ -139,8 +139,8 @@ static void ti_spi_set_speed(struct spi_slave *slave, uint hz)
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clk_div = (QSPI_FCLK / hz) - 1;
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clk_div = (QSPI_FCLK / hz) - 1;
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/* disable SCLK */
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/* disable SCLK */
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writel(readl(&qslave->base->clk_ctrl) & ~QSPI_CLK_EN,
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writel(readl(&priv->base->clk_ctrl) & ~QSPI_CLK_EN,
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&qslave->base->clk_ctrl);
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&priv->base->clk_ctrl);
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/* assign clk_div values */
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/* assign clk_div values */
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if (clk_div < 0)
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if (clk_div < 0)
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@ -149,7 +149,7 @@ static void ti_spi_set_speed(struct spi_slave *slave, uint hz)
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clk_div = QSPI_CLK_DIV_MAX;
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clk_div = QSPI_CLK_DIV_MAX;
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/* enable SCLK */
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/* enable SCLK */
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writel(QSPI_CLK_EN | clk_div, &qslave->base->clk_ctrl);
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writel(QSPI_CLK_EN | clk_div, &priv->base->clk_ctrl);
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}
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}
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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@ -165,11 +165,11 @@ void spi_cs_activate(struct spi_slave *slave)
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void spi_cs_deactivate(struct spi_slave *slave)
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void spi_cs_deactivate(struct spi_slave *slave)
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{
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{
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struct ti_qspi_slave *qslave = to_ti_qspi_slave(slave);
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struct ti_qspi_priv *priv = to_ti_qspi_priv(slave);
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debug("spi_cs_deactivate: 0x%08x\n", (u32)slave);
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debug("spi_cs_deactivate: 0x%08x\n", (u32)slave);
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writel(qslave->cmd | QSPI_INVAL, &qslave->base->cmd);
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writel(priv->cmd | QSPI_INVAL, &priv->base->cmd);
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/* dummy readl to ensure bus sync */
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/* dummy readl to ensure bus sync */
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readl(&qslave->base->cmd);
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readl(&qslave->base->cmd);
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}
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}
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@ -182,73 +182,73 @@ void spi_init(void)
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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unsigned int max_hz, unsigned int mode)
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{
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{
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struct ti_qspi_slave *qslave;
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struct ti_qspi_priv *priv;
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#ifdef CONFIG_AM43XX
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#ifdef CONFIG_AM43XX
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gpio_request(CONFIG_QSPI_SEL_GPIO, "qspi_gpio");
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gpio_request(CONFIG_QSPI_SEL_GPIO, "qspi_gpio");
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gpio_direction_output(CONFIG_QSPI_SEL_GPIO, 1);
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gpio_direction_output(CONFIG_QSPI_SEL_GPIO, 1);
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#endif
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#endif
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qslave = spi_alloc_slave(struct ti_qspi_slave, bus, cs);
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priv = spi_alloc_slave(struct ti_qspi_priv, bus, cs);
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if (!qslave) {
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if (!priv) {
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printf("SPI_error: Fail to allocate ti_qspi_slave\n");
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printf("SPI_error: Fail to allocate ti_qspi_priv\n");
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return NULL;
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return NULL;
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}
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}
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qslave->base = (struct ti_qspi_regs *)QSPI_BASE;
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priv->base = (struct ti_qspi_regs *)QSPI_BASE;
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qslave->mode = mode;
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priv->mode = mode;
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ti_spi_set_speed(&qslave->slave, max_hz);
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ti_spi_set_speed(&priv->slave, max_hz);
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#ifdef CONFIG_TI_SPI_MMAP
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#ifdef CONFIG_TI_SPI_MMAP
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ti_spi_setup_spi_register(qslave);
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ti_spi_setup_spi_register(priv);
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#endif
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#endif
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return &qslave->slave;
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return &priv->slave;
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}
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}
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void spi_free_slave(struct spi_slave *slave)
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void spi_free_slave(struct spi_slave *slave)
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{
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{
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struct ti_qspi_slave *qslave = to_ti_qspi_slave(slave);
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struct ti_qspi_priv *priv = to_ti_qspi_priv(slave);
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free(qslave);
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free(priv);
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}
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}
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int spi_claim_bus(struct spi_slave *slave)
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int spi_claim_bus(struct spi_slave *slave)
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{
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{
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struct ti_qspi_slave *qslave = to_ti_qspi_slave(slave);
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struct ti_qspi_priv *priv = to_ti_qspi_priv(slave);
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debug("spi_claim_bus: bus:%i cs:%i\n", slave->bus, slave->cs);
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debug("spi_claim_bus: bus:%i cs:%i\n", slave->bus, slave->cs);
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qslave->dc = 0;
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priv->dc = 0;
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if (qslave->mode & SPI_CPHA)
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if (priv->mode & SPI_CPHA)
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qslave->dc |= QSPI_CKPHA(slave->cs);
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priv->dc |= QSPI_CKPHA(slave->cs);
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if (qslave->mode & SPI_CPOL)
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if (priv->mode & SPI_CPOL)
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qslave->dc |= QSPI_CKPOL(slave->cs);
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priv->dc |= QSPI_CKPOL(slave->cs);
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if (qslave->mode & SPI_CS_HIGH)
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if (priv->mode & SPI_CS_HIGH)
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qslave->dc |= QSPI_CSPOL(slave->cs);
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priv->dc |= QSPI_CSPOL(slave->cs);
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writel(qslave->dc, &qslave->base->dc);
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writel(priv->dc, &priv->base->dc);
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writel(0, &qslave->base->cmd);
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writel(0, &priv->base->cmd);
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writel(0, &qslave->base->data);
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writel(0, &priv->base->data);
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return 0;
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return 0;
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}
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}
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void spi_release_bus(struct spi_slave *slave)
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void spi_release_bus(struct spi_slave *slave)
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{
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{
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struct ti_qspi_slave *qslave = to_ti_qspi_slave(slave);
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struct ti_qspi_priv *priv = to_ti_qspi_priv(slave);
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debug("spi_release_bus: bus:%i cs:%i\n", slave->bus, slave->cs);
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debug("spi_release_bus: bus:%i cs:%i\n", slave->bus, slave->cs);
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writel(0, &qslave->base->dc);
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writel(0, &priv->base->dc);
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writel(0, &qslave->base->cmd);
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writel(0, &priv->base->cmd);
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writel(0, &qslave->base->data);
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writel(0, &priv->base->data);
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}
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}
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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void *din, unsigned long flags)
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void *din, unsigned long flags)
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{
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{
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struct ti_qspi_slave *qslave = to_ti_qspi_slave(slave);
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struct ti_qspi_priv *priv = to_ti_qspi_priv(slave);
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uint words = bitlen >> 3; /* fixed 8-bit word length */
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uint words = bitlen >> 3; /* fixed 8-bit word length */
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const uchar *txp = dout;
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const uchar *txp = dout;
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uchar *rxp = din;
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uchar *rxp = din;
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@ -264,7 +264,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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/* Setup mmap flags */
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/* Setup mmap flags */
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if (flags & SPI_XFER_MMAP) {
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if (flags & SPI_XFER_MMAP) {
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writel(MM_SWITCH, &qslave->base->memswitch);
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writel(MM_SWITCH, &priv->base->memswitch);
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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val = readl(CORE_CTRL_IO);
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val = readl(CORE_CTRL_IO);
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val |= MEM_CS(slave->cs);
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val |= MEM_CS(slave->cs);
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@ -272,7 +272,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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#endif
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#endif
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return 0;
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return 0;
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} else if (flags & SPI_XFER_MMAP_END) {
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} else if (flags & SPI_XFER_MMAP_END) {
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writel(~MM_SWITCH, &qslave->base->memswitch);
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writel(~MM_SWITCH, &priv->base->memswitch);
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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val = readl(CORE_CTRL_IO);
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val = readl(CORE_CTRL_IO);
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val &= MEM_CS_UNSELECT;
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val &= MEM_CS_UNSELECT;
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@ -290,12 +290,12 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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}
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}
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/* Setup command reg */
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/* Setup command reg */
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qslave->cmd = 0;
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priv->cmd = 0;
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qslave->cmd |= QSPI_WLEN(8);
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priv->cmd |= QSPI_WLEN(8);
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qslave->cmd |= QSPI_EN_CS(slave->cs);
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priv->cmd |= QSPI_EN_CS(slave->cs);
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if (qslave->mode & SPI_3WIRE)
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if (priv->mode & SPI_3WIRE)
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qslave->cmd |= QSPI_3_PIN;
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priv->cmd |= QSPI_3_PIN;
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qslave->cmd |= 0xfff;
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priv->cmd |= 0xfff;
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/* FIXME: This delay is required for successfull
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/* FIXME: This delay is required for successfull
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* completion of read/write/erase. Once its root
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* completion of read/write/erase. Once its root
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@ -307,39 +307,39 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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while (words--) {
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while (words--) {
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if (txp) {
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if (txp) {
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debug("tx cmd %08x dc %08x data %02x\n",
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debug("tx cmd %08x dc %08x data %02x\n",
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qslave->cmd | QSPI_WR_SNGL, qslave->dc, *txp);
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priv->cmd | QSPI_WR_SNGL, priv->dc, *txp);
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writel(*txp++, &qslave->base->data);
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writel(*txp++, &priv->base->data);
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writel(qslave->cmd | QSPI_WR_SNGL,
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writel(priv->cmd | QSPI_WR_SNGL,
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&qslave->base->cmd);
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&priv->base->cmd);
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status = readl(&qslave->base->status);
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status = readl(&priv->base->status);
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timeout = QSPI_TIMEOUT;
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timeout = QSPI_TIMEOUT;
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while ((status & QSPI_WC_BUSY) != QSPI_XFER_DONE) {
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while ((status & QSPI_WC_BUSY) != QSPI_XFER_DONE) {
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if (--timeout < 0) {
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if (--timeout < 0) {
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printf("spi_xfer: TX timeout!\n");
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printf("spi_xfer: TX timeout!\n");
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return -1;
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return -1;
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}
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}
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status = readl(&qslave->base->status);
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status = readl(&priv->base->status);
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}
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}
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debug("tx done, status %08x\n", status);
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debug("tx done, status %08x\n", status);
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}
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}
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if (rxp) {
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if (rxp) {
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qslave->cmd |= QSPI_RD_SNGL;
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priv->cmd |= QSPI_RD_SNGL;
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debug("rx cmd %08x dc %08x\n",
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debug("rx cmd %08x dc %08x\n",
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qslave->cmd, qslave->dc);
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priv->cmd, priv->dc);
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#ifdef CONFIG_DRA7XX
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#ifdef CONFIG_DRA7XX
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udelay(500);
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udelay(500);
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#endif
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#endif
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writel(qslave->cmd, &qslave->base->cmd);
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writel(priv->cmd, &priv->base->cmd);
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status = readl(&qslave->base->status);
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status = readl(&priv->base->status);
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timeout = QSPI_TIMEOUT;
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timeout = QSPI_TIMEOUT;
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while ((status & QSPI_WC_BUSY) != QSPI_XFER_DONE) {
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while ((status & QSPI_WC_BUSY) != QSPI_XFER_DONE) {
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if (--timeout < 0) {
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if (--timeout < 0) {
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printf("spi_xfer: RX timeout!\n");
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printf("spi_xfer: RX timeout!\n");
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return -1;
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return -1;
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}
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}
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status = readl(&qslave->base->status);
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status = readl(&priv->base->status);
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}
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}
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*rxp++ = readl(&qslave->base->data);
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*rxp++ = readl(&priv->base->data);
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debug("rx done, status %08x, read %02x\n",
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debug("rx done, status %08x, read %02x\n",
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status, *(rxp-1));
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status, *(rxp-1));
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}
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}
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