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Add e6500 L2 replacement policy selection

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This is compile-time config.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
James Yang 2013-03-25 07:40:03 +00:00 • committed by Andy Fleming
parent c79fd50382
commit 9cd95ac74a
3 changed files with 11 additions and 1 deletions
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2
arch/powerpc/cpu/mpc85xx/cpu_init.c
View file

@ -337,7 +337,7 @@ int enable_cluster_l2(void)
while ((in_be32(&l2cache->l2csr0) while ((in_be32(&l2cache->l2csr0)
& (L2CSR0_L2FI|L2CSR0_L2LFC)) != 0) & (L2CSR0_L2FI|L2CSR0_L2LFC)) != 0)
; ;
out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE); out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE|L2CSR0_L2REP_MODE);
} }
i++; i++;
} while (!(cluster & TP_CLUSTER_EOC)); } while (!(cluster & TP_CLUSTER_EOC));

1
arch/powerpc/cpu/mpc85xx/start.S
View file

@ -735,6 +735,7 @@ enable_l2_cluster_l2:
and. r1, r0, r4 and. r1, r0, r4
bne 1b bne 1b
lis r4, (L2CSR0_L2E|L2CSR0_L2PE)@h lis r4, (L2CSR0_L2E|L2CSR0_L2PE)@h
ori r4, r4, (L2CSR0_L2REP_MODE)@l
sync sync
stw r4, 0(r3) /* enable L2 */ stw r4, 0(r3) /* enable L2 */
delete_ccsr_l2_tlb: delete_ccsr_l2_tlb:

9
arch/powerpc/include/asm/processor.h
View file

@ -507,6 +507,15 @@
#define L2CSR0_L2IO 0x00100000 /* L2 Cache Instruction Only */ #define L2CSR0_L2IO 0x00100000 /* L2 Cache Instruction Only */
#define L2CSR0_L2DO 0x00010000 /* L2 Cache Data Only */ #define L2CSR0_L2DO 0x00010000 /* L2 Cache Data Only */
#define L2CSR0_L2REP 0x00003000 /* L2 Line Replacement Algo */ #define L2CSR0_L2REP 0x00003000 /* L2 Line Replacement Algo */
/* e6500 */
#define L2CSR0_L2REP_SPLRUAGE 0x00000000 /* L2REP Streaming PLRU with Aging */
#define L2CSR0_L2REP_FIFO 0x00001000 /* L2REP FIFO */
#define L2CSR0_L2REP_SPLRU 0x00002000 /* L2REP Streaming PLRU */
#define L2CSR0_L2REP_PLRU 0x00003000 /* L2REP PLRU */
#define L2CSR0_L2REP_MODE L2CSR0_L2REP_SPLRUAGE
#define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ #define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */
#define L2CSR0_L2LFC 0x00000400 /* L2 Cache Lock Flash Clear */ #define L2CSR0_L2LFC 0x00000400 /* L2 Cache Lock Flash Clear */
#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */ #define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */