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ARM: HYP/non-sec: remove MIDR check to validate CBAR
Having a form of whitelist to check if we know of a CPU core and and obtain CBAR is a bit silly. It doesn't scale (how about A12, A17, as well as other I don't know about?), and is actually a property of the SoC, not the core. So either it works and everybody is happy, or it doesn't and the u-boot port to this SoC is providing the real address via a configuration option. The result of the above is that this code doesn't need to exist, is thus forcefully removed. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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@ -30,25 +30,8 @@ static unsigned long get_gicd_base_address(void)
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#ifdef CONFIG_ARM_GIC_BASE_ADDRESS
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return CONFIG_ARM_GIC_BASE_ADDRESS + GIC_DIST_OFFSET;
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#else
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unsigned midr;
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unsigned periphbase;
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/* check whether we are an Cortex-A15 or A7.
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* The actual HYP switch should work with all CPUs supporting
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* the virtualization extension, but we need the GIC address,
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* which we know only for sure for those two CPUs.
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*/
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asm("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
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switch (midr & MIDR_PRIMARY_PART_MASK) {
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case MIDR_CORTEX_A9_R0P1:
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case MIDR_CORTEX_A15_R0P0:
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case MIDR_CORTEX_A7_R0P0:
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break;
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default:
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printf("nonsec: could not determine GIC address.\n");
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return -1;
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}
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/* get the GIC base address from the CBAR register */
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asm("mrc p15, 4, %0, c15, c0, 0\n" : "=r" (periphbase));
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