GitHub-Mirror/u-boot
2
0
Fork 0
mirror of https://github.com/Fishwaldo/u-boot.git synced 2025-03-19 05:31:32 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

sh: serial: coding style cleanup

Browse source 
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD 2009-01-11 16:35:15 +01:00 • committed by Nobuhiro Iwamatsu
parent c9935c9925
commit 9e1fa628bd
1 changed files with 18 additions and 17 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
drivers/serial/serial_sh.c
View file

@ -106,12 +106,12 @@
/* SCBRR register value setting */
#if defined(CONFIG_CPU_SH7720)
# define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
# define SCBRR_VALUE(bps, clk) (((clk * 2) + 16 * bps) / (32 * bps) - 1)
#elif defined(CONFIG_CPU_SH7723) && defined(CONFIG_SCIF_A)
/* SH7723 SCIFA use bus clock. So clock *2 */
# define SCBRR_VALUE(bps, clk) (((clk*2*2)+16*bps)/(32*bps)-1)
# define SCBRR_VALUE(bps, clk) (((clk * 2 * 2) + 16 * bps) / (32 * bps) - 1)
#else /* Generic SuperH */
# define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
# define SCBRR_VALUE(bps, clk) ((clk + 16 * bps) / (32 * bps) - 1)
#endif
#define SCR_RE (1 << 4)
@ -131,6 +131,7 @@
void serial_setbrg(void)
{
DECLARE_GLOBAL_DATA_PTR;
*SCBRR = SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ);
}