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Blackfin: unify u-boot linker scripts

Browse source 
All the Blackfin linker scripts were duplicated across the board dirs with
no difference save from the semi-often used ENV_IS_EMBEDDED option.  So
unify all of them in the lib_blackfin/ dir and for the few boards that
need to embedded the environment directly, add a LDS_BOARD_TEXT define for
them to customize via their board config file.  This is much simpler than
forcing them to duplicate the rest of the linker script.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2009-06-14 06:29:07 -04:00
parent f52efcae98
commit 9ff67e5e4c
92 changed files with 162 additions and 2795 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
Makefile
View file

@ -3571,11 +3571,7 @@ clean:
$(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \
$(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \
$(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \
$(obj)board/bf5{18f,26,27,33,38f,48,61}-ez{brd,kit}/u-boot.lds \
$(obj)board/bf5{33,37}-stamp/u-boot.lds \
$(obj)board/{bf537-{minotaur,pnav,srv1},blackstamp}/u-boot.lds \
$(obj)board/{,t}cm-bf5{27,33,37e,48,61}/u-boot.lds \
$(obj)board/ibf-dsp561/u-boot.lds \
$(obj)lib_blackfin/u-boot.lds \
$(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
@rm -f $(obj)include/bmp_logo.h
@rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map}

4
blackfin_config.mk
View file

@ -56,3 +56,7 @@ LDR_FLAGS += --quiet
endif
LDR_FLAGS += $(LDR_FLAGS-y)
ifeq ($(wildcard $(TOPDIR)/board/$(BOARD)/u-boot.lds*),)
LDSCRIPT = $(obj)lib_$(ARCH)/u-boot.lds
endif

1
board/bf518f-ezbrd/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf518f-ezbrd/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf518f-ezbrd/config.mk
View file

@ -26,7 +26,5 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

124
board/bf518f-ezbrd/u-boot.lds.S
View file

@ -1,124 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/bf526-ezbrd/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf526-ezbrd/Makefile
View file

@ -36,12 +36,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf526-ezbrd/config.mk
View file

@ -26,7 +26,5 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

124
board/bf526-ezbrd/u-boot.lds.S
View file

@ -1,124 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/bf527-ezkit/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf527-ezkit/Makefile
View file

@ -36,12 +36,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf527-ezkit/config.mk
View file

@ -26,7 +26,5 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

1
board/bf533-ezkit/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf533-ezkit/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf533-ezkit/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

145
board/bf533-ezkit/u-boot.lds.S
View file

@ -1,145 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
lib_generic/zlib.o (.text .text.*)
board/bf533-ezkit/bf533-ezkit.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/bf533-stamp/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf533-stamp/Makefile
View file

@ -36,12 +36,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf533-stamp/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

143
board/bf533-stamp/u-boot.lds.S
View file

@ -1,143 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/bf537-minotaur/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf537-minotaur/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf537-minotaur/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

143
board/bf537-minotaur/u-boot.lds.S
View file

@ -1,143 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/bf537-pnav/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf537-pnav/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf537-pnav/config.mk
View file

@ -26,7 +26,5 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

143
board/bf537-pnav/u-boot.lds.S
View file

@ -1,143 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/bf537-srv1/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf537-srv1/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf537-srv1/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

143
board/bf537-srv1/u-boot.lds.S
View file

@ -1,143 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/bf537-stamp/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf537-stamp/Makefile
View file

@ -39,12 +39,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf537-stamp/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6

143
board/bf537-stamp/u-boot.lds.S
View file

@ -1,143 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/bf538f-ezkit/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf538f-ezkit/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf538f-ezkit/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

143
board/bf538f-ezkit/u-boot.lds.S
View file

@ -1,143 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/bf548-ezkit/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf548-ezkit/Makefile
View file

@ -36,12 +36,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf548-ezkit/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --dma 6
LDR_FLAGS-BFIN_BOOT_FIFO := --dma 1

124
board/bf548-ezkit/u-boot.lds.S
View file

@ -1,124 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/bf561-ezkit/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/bf561-ezkit/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/bf561-ezkit/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

152
board/bf561-ezkit/u-boot.lds.S
View file

@ -1,152 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1
# define L1_CODE_ORIGIN L1_INST_SRAM
#else
# define L1_CODE_ORIGIN L1_INST_SRAM + 0xC
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_CODE_ORIGIN, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
lib_generic/zlib.o (.text .text.*)
board/bf561-ezkit/bf561-ezkit.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/blackstamp/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/blackstamp/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/blackstamp/config.mk
View file

@ -26,7 +26,5 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

143
board/blackstamp/u-boot.lds.S
View file

@ -1,143 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/cm-bf527/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/cm-bf527/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/cm-bf527/config.mk
View file

@ -26,7 +26,5 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

124
board/cm-bf527/u-boot.lds.S
View file

@ -1,124 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/cm-bf533/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/cm-bf533/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/cm-bf533/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

143
board/cm-bf533/u-boot.lds.S
View file

@ -1,143 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/cm-bf537e/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/cm-bf537e/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/cm-bf537e/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

143
board/cm-bf537e/u-boot.lds.S
View file

@ -1,143 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/cm-bf548/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/cm-bf548/Makefile
View file

@ -36,12 +36,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/cm-bf548/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --dma 6
LDR_FLAGS-BFIN_BOOT_FIFO := --dma 1

124
board/cm-bf548/u-boot.lds.S
View file

@ -1,124 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/cm-bf561/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/cm-bf561/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/cm-bf561/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

150
board/cm-bf561/u-boot.lds.S
View file

@ -1,150 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1
# define L1_CODE_ORIGIN L1_INST_SRAM
#else
# define L1_CODE_ORIGIN L1_INST_SRAM + 0xC
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_CODE_ORIGIN, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/ibf-dsp561/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/ibf-dsp561/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/ibf-dsp561/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

152
board/ibf-dsp561/u-boot.lds.S
View file

@ -1,152 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
/* The 0xC offset is so we don't clobber the tiny LDR jump block. */
#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1
# define L1_CODE_ORIGIN L1_INST_SRAM
#else
# define L1_CODE_ORIGIN L1_INST_SRAM + 0xC
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_CODE_ORIGIN, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
lib_generic/zlib.o (.text .text.*)
board/ibf-dsp561/ibf-dsp561.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

1
board/tcm-bf537/.gitignore vendored
View file

@ -1 +0,0 @@
/u-boot.lds

5
board/tcm-bf537/Makefile
View file

@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

2
board/tcm-bf537/config.mk
View file

@ -26,8 +26,6 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
# Set some default LDR flags based on boot mode.
LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

143
board/tcm-bf537/u-boot.lds.S
View file

@ -1,143 +0,0 @@
/*
* U-boot - u-boot.lds.S
*
* Copyright (c) 2005-2008 Analog Device Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <asm/blackfin.h>
#undef ALIGN
#undef ENTRY
#undef bfin
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
* This is here in the first place so we can quickly test building
* for different CPU's which may lack non-cache L1 data.
*/
#ifndef L1_DATA_B_SRAM
# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE
# define L1_DATA_B_SRAM_SIZE 0
#endif
OUTPUT_ARCH(bfin)
MEMORY
{
ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN
l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE
l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE
}
ENTRY(_start)
SECTIONS
{
.text :
{
cpu/blackfin/start.o (.text .text.*)
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
cpu/blackfin/traps.o (.text .text.*)
cpu/blackfin/interrupt.o (.text .text.*)
cpu/blackfin/serial.o (.text .text.*)
common/dlmalloc.o (.text .text.*)
lib_generic/crc32.o (.text .text.*)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.text .text.*)
#endif
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram
.rodata :
{
. = ALIGN(4);
*(.rodata .rodata.*)
*(.rodata1)
*(.eh_frame)
. = ALIGN(4);
} >ram
.data :
{
. = ALIGN(256);
*(.data .data.*)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
} >ram
.u_boot_cmd :
{
___u_boot_cmd_start = .;
*(.u_boot_cmd)
___u_boot_cmd_end = .;
} >ram
.text_l1 :
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
. = ALIGN(4);
__etext_l1 = .;
} >l1_code AT>ram
__stext_l1_lma = LOADADDR(.text_l1);
.data_l1 :
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
*(.l1.bss)
. = ALIGN(4);
__edata_l1 = .;
} >l1_data AT>ram
__sdata_l1_lma = LOADADDR(.data_l1);
.bss :
{
. = ALIGN(4);
__bss_start = .;
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss .bss.*)
*(COMMON)
__bss_end = .;
} >ram
}

15
include/configs/bf533-stamp.h
View file

@ -117,6 +117,21 @@
#else
#define ENV_IS_EMBEDDED_CUSTOM
#endif
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
# define LDS_BOARD_TEXT \
cpu/blackfin/traps.o (.text .text.*); \
cpu/blackfin/interrupt.o (.text .text.*); \
cpu/blackfin/serial.o (.text .text.*); \
common/dlmalloc.o (.text .text.*); \
lib_generic/crc32.o (.text .text.*); \
. = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text .text.*);
#endif
/*

15
include/configs/bf537-pnav.h
View file

@ -105,6 +105,21 @@
#endif
#define CONFIG_ENV_SIZE 0x1000
#define CONFIG_ENV_SECT_SIZE 0x2000
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
# define LDS_BOARD_TEXT \
cpu/blackfin/traps.o (.text .text.*); \
cpu/blackfin/interrupt.o (.text .text.*); \
cpu/blackfin/serial.o (.text .text.*); \
common/dlmalloc.o (.text .text.*); \
lib_generic/crc32.o (.text .text.*); \
. = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text .text.*);
#endif
/*

15
include/configs/bf537-stamp.h
View file

@ -115,6 +115,21 @@
#else
#define ENV_IS_EMBEDDED_CUSTOM
#endif
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
# define LDS_BOARD_TEXT \
cpu/blackfin/traps.o (.text .text.*); \
cpu/blackfin/interrupt.o (.text .text.*); \
cpu/blackfin/serial.o (.text .text.*); \
common/dlmalloc.o (.text .text.*); \
lib_generic/crc32.o (.text .text.*); \
. = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text .text.*);
#endif
/*

15
include/configs/bf538f-ezkit.h
View file

@ -111,6 +111,21 @@
#else
#define ENV_IS_EMBEDDED_CUSTOM
#endif
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
# define LDS_BOARD_TEXT \
cpu/blackfin/traps.o (.text .text.*); \
cpu/blackfin/interrupt.o (.text .text.*); \
cpu/blackfin/serial.o (.text .text.*); \
common/dlmalloc.o (.text .text.*); \
lib_generic/crc32.o (.text .text.*); \
. = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text .text.*);
#endif
/*

17
include/configs/bf561-ezkit.h
View file

@ -88,6 +88,23 @@
#else
#define ENV_IS_EMBEDDED_CUSTOM
#endif
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
# define LDS_BOARD_TEXT \
cpu/blackfin/traps.o (.text .text.*); \
cpu/blackfin/interrupt.o (.text .text.*); \
cpu/blackfin/serial.o (.text .text.*); \
common/dlmalloc.o (.text .text.*); \
lib_generic/crc32.o (.text .text.*); \
lib_generic/zlib.o (.text .text.*); \
board/bf561-ezkit/bf561-ezkit.o (.text .text.*); \
. = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text .text.*);
#endif
/*

15
include/configs/cm-bf537e.h
View file

@ -94,6 +94,21 @@
#else
#define ENV_IS_EMBEDDED_CUSTOM
#endif
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
# define LDS_BOARD_TEXT \
cpu/blackfin/traps.o (.text .text.*); \
cpu/blackfin/interrupt.o (.text .text.*); \
cpu/blackfin/serial.o (.text .text.*); \
common/dlmalloc.o (.text .text.*); \
lib_generic/crc32.o (.text .text.*); \
. = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text .text.*);
#endif
/*

17
include/configs/ibf-dsp561.h
View file

@ -77,6 +77,23 @@
#else
#define ENV_IS_EMBEDDED_CUSTOM
#endif
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
# define LDS_BOARD_TEXT \
cpu/blackfin/traps.o (.text .text.*); \
cpu/blackfin/interrupt.o (.text .text.*); \
cpu/blackfin/serial.o (.text .text.*); \
common/dlmalloc.o (.text .text.*); \
lib_generic/crc32.o (.text .text.*); \
lib_generic/zlib.o (.text .text.*); \
board/ibf-dsp561/ibf-dsp561.o (.text .text.*); \
. = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text .text.*);
#endif
/*

15
include/configs/tcm-bf537.h
View file

@ -95,6 +95,21 @@
#else
#define ENV_IS_EMBEDDED_CUSTOM
#endif
#ifdef ENV_IS_EMBEDDED
/* WARNING - the following is hand-optimized to fit within
* the sector before the environment sector. If it throws
* an error during compilation remove an object here to get
* it linked after the configuration sector.
*/
# define LDS_BOARD_TEXT \
cpu/blackfin/traps.o (.text .text.*); \
cpu/blackfin/interrupt.o (.text .text.*); \
cpu/blackfin/serial.o (.text .text.*); \
common/dlmalloc.o (.text .text.*); \
lib_generic/crc32.o (.text .text.*); \
. = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text .text.*);
#endif
/*

1
lib_blackfin/.gitignore vendored Normal file
View file

@ -0,0 +1 @@
u-boot.lds

5
lib_blackfin/Makefile
View file

@ -47,9 +47,12 @@ COBJS-y += string.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
$(LIB): $(obj).depend $(OBJS)
$(LIB): $(obj).depend $(OBJS) $(obj)u-boot.lds
$(AR) $(ARFLAGS) $@ $(OBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
#########################################################################
# defines $(obj).depend target

8
board/bf527-ezkit/u-boot.lds.S → lib_blackfin/u-boot.lds.S
View file

@ -31,6 +31,10 @@
#undef ENTRY
#undef bfin
#ifndef LDS_BOARD_TEXT
# define LDS_BOARD_TEXT
#endif
/* If we don't actually load anything into L1 data, this will avoid
* a syntax error. If we do actually load something into L1 data,
* we'll get a linker memory load error (which is what we'd want).
@ -57,9 +61,13 @@ SECTIONS
.text :
{
cpu/blackfin/start.o (.text .text.*)
LDS_BOARD_TEXT
__initcode_start = .;
cpu/blackfin/initcode.o (.text .text.*)
__initcode_end = .;
*(.text .text.*)
} >ram