From 0df62e8da8f48d8bbabd1d92512173cbb424e3c5 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 11 Feb 2019 07:53:34 +0100 Subject: [PATCH 01/10] pci: pci_mvebu: Add comment about missing of_n_addr_cells() call This patch adds a comment to explain the use of the hardcoded value for the number of address cells in mvebu_get_tgt_attr(). This should help to rework this function, once CONFIG_OF_LIVE is enabled for MVEBU in general. Signed-off-by: Stefan Roese Cc: Bin Meng Signed-off-by: Stefan Roese --- drivers/pci/pci_mvebu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index 6026fa67f9..e21dc10c2f 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -369,6 +369,12 @@ static int mvebu_get_tgt_attr(ofnode node, int devfn, if (!range) return -EINVAL; + /* + * Linux uses of_n_addr_cells() to get the number of address cells + * here. Currently this function is only available in U-Boot when + * CONFIG_OF_LIVE is enabled. Until this is enabled for MVEBU in + * general, lets't hardcode the "pna" value in the U-Boot code. + */ pna = 2; /* hardcoded for now because of lack of of_n_addr_cells() */ rangesz = pna + na + ns; nranges = rlen / sizeof(__be32) / rangesz; From 09d39748c902f2e49357b7585c12bf9128dadb6a Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Mon, 11 Feb 2019 14:19:55 +0200 Subject: [PATCH 02/10] configs/clearfog_gt_8k: add network interface support Enable the mvpp2 network driver for the Armada 8K SoC. Enable the Marvell PHY driver for the on-board 1512 PHY. Signed-off-by: Baruch Siach Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- configs/clearfog_gt_8k_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index ee84877654..526c14a394 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_DEFAULT_DEVICE_TREE="armada-8040-clearfog-gt-8k" CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_AHCI_MVEBU=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y @@ -48,8 +49,9 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y -CONFIG_PHYLIB=y +CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y +CONFIG_MVPP2=y CONFIG_NVME=y CONFIG_PCI=y CONFIG_DM_PCI=y From 1579faf52b9f4df2c896ad6fbb67c11e2efb019a Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 15 Feb 2019 13:56:56 +0100 Subject: [PATCH 03/10] MAINTAINERS: Update u-boot-marvell entry This patch does the following changes to the u-boot-marvell maintainers entry: - Add Armada-7k/8k to the list - Remove Prafulla and Luka since they have been silent on the list for a long time. Please speak up, if you would like to continue or better start maintaining. - Add multiple Marvell / MVEBU related driver directories and files Signed-off-by: Stefan Roese Cc: Prafulla Wadaskar Cc: Luka Perkov Cc: Tom Rini Acked-by: Luka Perkov Signed-off-by: Stefan Roese --- MAINTAINERS | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 16918154f1..8a4c5d4eab 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -161,16 +161,19 @@ S: Maintained F: arch/arm/cpu/armv8/hisilicon F: arch/arm/include/asm/arch-hi6220/ -ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX -M: Prafulla Wadaskar -M: Luka Perkov +ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX ARMADA-7K/8K M: Stefan Roese S: Maintained T: git git://git.denx.de/u-boot-marvell.git F: arch/arm/mach-kirkwood/ F: arch/arm/mach-mvebu/ F: drivers/ata/ahci_mvebu.c -F: drivers/phy/marvell/ +F: drivers/ddr/marvell/ +F: drivers/gpio/mvebu_gpio.c +F: drivers/spi/kirkwood_spi.c +F: drivers/pci/pci_mvebu.c +F: drivers/pci/pcie_dw_mvebu.c +F: drivers/watchdog/orion_wdt.c ARM MARVELL PXA M: Marek Vasut From 5860532264326d8eb387ccfd9037792cc6d57fd1 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Thu, 28 Feb 2019 20:53:23 +1300 Subject: [PATCH 04/10] ARM: kirkwood: add spi0 alias for dreamplug The conversion to DM_SPI managed to break accessing the environment on dreamplug. This is because the environment code relies on being to able to select the SPI device based on the sequence number. Add an alias so that the spi0 bus gets sequence number 0. Reported-by: Leigh Brown Signed-off-by: Chris Packham Tested-by: Leigh Brown Signed-off-by: Stefan Roese --- arch/arm/dts/kirkwood-dreamplug.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/kirkwood-dreamplug.dts b/arch/arm/dts/kirkwood-dreamplug.dts index a647a65c20..ccd74dd7fb 100644 --- a/arch/arm/dts/kirkwood-dreamplug.dts +++ b/arch/arm/dts/kirkwood-dreamplug.dts @@ -18,6 +18,10 @@ stdout-path = &uart0; }; + aliases { + spi0 = &spi0; + }; + ocp@f1000000 { pinctrl: pin-controller@10000 { pmx_led_bluetooth: pmx-led-bluetooth { From 08dcbc98236c4ea9eb4b9d4731a53022204c4809 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Fri, 1 Mar 2019 10:11:13 +1300 Subject: [PATCH 05/10] mv_ddr: ddr3: fix tRAS timimg parameter Based on the JEDEC standard JESD79-3F. The tRAS timings should include the highest speed bins at a given frequency. This is similar to commit 683c67b ("mv_ddr: ddr3: fix tfaw timimg parameter") where the wrong comparison was used in the initial implementation. Signed-off-by: Chris Packham [https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/15] Signed-off-by: Chris Packham Signed-off-by: Stefan Roese --- drivers/ddr/marvell/a38x/ddr3_training_db.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/ddr/marvell/a38x/ddr3_training_db.c b/drivers/ddr/marvell/a38x/ddr3_training_db.c index 111a8586c6..b2f11a8399 100644 --- a/drivers/ddr/marvell/a38x/ddr3_training_db.c +++ b/drivers/ddr/marvell/a38x/ddr3_training_db.c @@ -420,13 +420,13 @@ unsigned int mv_ddr_speed_bin_timing_get(enum mv_ddr_speed_bin index, enum mv_dd result = speed_bin_table_t_rcd_t_rp[index]; break; case SPEED_BIN_TRAS: - if (index < SPEED_BIN_DDR_1066G) + if (index <= SPEED_BIN_DDR_1066G) result = 37500; - else if (index < SPEED_BIN_DDR_1333J) + else if (index <= SPEED_BIN_DDR_1333J) result = 36000; - else if (index < SPEED_BIN_DDR_1600K) + else if (index <= SPEED_BIN_DDR_1600K) result = 35000; - else if (index < SPEED_BIN_DDR_1866M) + else if (index <= SPEED_BIN_DDR_1866M) result = 34000; else result = 33000; From 247c80d6b8ad07871845a846796ae6b40f34b4f6 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Fri, 1 Mar 2019 10:11:14 +1300 Subject: [PATCH 06/10] mv_ddr: ddr3: only use active chip-selects when tuning ODT Inactive chip-selects will give invalid values for read_sample so don't consider them when trying to determine the overall min/max read sample. Signed-off-by: Chris Packham [https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/18] Signed-off-by: Chris Packham Signed-off-by: Stefan Roese --- drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c b/drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c index db0f8ad7fb..df832ac6dc 100644 --- a/drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c +++ b/drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c @@ -50,6 +50,7 @@ int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id) int max_phase = MIN_VALUE, current_phase; enum hws_access_type access_type = ACCESS_TYPE_UNICAST; u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE); + unsigned int max_cs = mv_ddr_cs_num_get(); CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id, DUNIT_ODT_CTRL_REG, @@ -59,7 +60,7 @@ int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id) data_read, MASK_ALL_BITS)); val = data_read[if_id]; - for (cs_num = 0; cs_num < MAX_CS_NUM; cs_num++) { + for (cs_num = 0; cs_num < max_cs; cs_num++) { read_sample[cs_num] = GET_RD_SAMPLE_DELAY(val, cs_num); /* find maximum of read_samples */ From 94425efee1aea2a0b1702c2f6939abc722a92021 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Fri, 1 Mar 2019 14:30:03 +1300 Subject: [PATCH 07/10] ARM: mvebu: set CONFIG_SYS_MALLOC_F_LEN to 0x2000 Set CONFIG_SYS_MALLOC_F_LEN to match the rest of the mvebu boards. The default of 0x400 is not enough when booting from SPI. Signed-off-by: Chris Packham Signed-off-by: Stefan Roese --- configs/db-88f6820-amc_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 3e1b404408..f5d35229d1 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MVEBU=y CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DB_88F6820_AMC=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y From 3a2117d4fde6a0456d5cb141e93479f389aa2c25 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Sat, 2 Mar 2019 20:45:35 +1300 Subject: [PATCH 08/10] ARM: mvebu: db-88f6820-amc: enable SPI_FLASH_BAR This board uses Micron N25Q256A SPI flash. Enable SPI_FLASH_BAR to allow us to access the whole chip. Signed-off-by: Chris Packham Cc: Vignesh R Signed-off-by: Stefan Roese --- configs/db-88f6820-amc_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index f5d35229d1..319d9dbd9c 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -53,6 +53,7 @@ CONFIG_SYS_I2C_MVTWSI=y CONFIG_NAND=y CONFIG_NAND_PXA3XX=y CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y From 825dd50f59537d8f301061a9638ed1805c5fdeb7 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Sat, 16 Mar 2019 20:46:20 +1300 Subject: [PATCH 09/10] ARM: mvebu: use correct name for pcie controller MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When armada-385.dtsi was sync'd from Linux the name of the node describing the pcie controller was changed from pcie-controller to pcie. Some of the boards that include armada-385.dtsi were missed in the update retaining the old name. This updates the affected boards. Reported-by: Влад Мао Signed-off-by: Chris Packham Signed-off-by: Stefan Roese --- arch/arm/dts/armada-385-amc.dts | 2 +- arch/arm/dts/armada-385-turris-omnia.dts | 2 +- arch/arm/dts/armada-388-clearfog.dts | 2 +- arch/arm/dts/armada-388-gp.dts | 2 +- arch/arm/dts/armada-38x-controlcenterdc.dts | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/armada-385-amc.dts b/arch/arm/dts/armada-385-amc.dts index d4d127fa02..c9ccbb57ff 100644 --- a/arch/arm/dts/armada-385-amc.dts +++ b/arch/arm/dts/armada-385-amc.dts @@ -133,7 +133,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; pcie@1,0 { /* Port 0, Lane 0 */ diff --git a/arch/arm/dts/armada-385-turris-omnia.dts b/arch/arm/dts/armada-385-turris-omnia.dts index 28eede180e..5511c84849 100644 --- a/arch/arm/dts/armada-385-turris-omnia.dts +++ b/arch/arm/dts/armada-385-turris-omnia.dts @@ -96,7 +96,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; pcie@1,0 { diff --git a/arch/arm/dts/armada-388-clearfog.dts b/arch/arm/dts/armada-388-clearfog.dts index a3493ddd4d..4ddeaa02f1 100644 --- a/arch/arm/dts/armada-388-clearfog.dts +++ b/arch/arm/dts/armada-388-clearfog.dts @@ -124,7 +124,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; /* * The two PCIe units are accessible through diff --git a/arch/arm/dts/armada-388-gp.dts b/arch/arm/dts/armada-388-gp.dts index 7bc878f5a9..d5ad2fd7e2 100644 --- a/arch/arm/dts/armada-388-gp.dts +++ b/arch/arm/dts/armada-388-gp.dts @@ -234,7 +234,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; /* * One PCIe units is accessible through diff --git a/arch/arm/dts/armada-38x-controlcenterdc.dts b/arch/arm/dts/armada-38x-controlcenterdc.dts index ffbd0dcaae..bad7c60f19 100644 --- a/arch/arm/dts/armada-38x-controlcenterdc.dts +++ b/arch/arm/dts/armada-38x-controlcenterdc.dts @@ -243,7 +243,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; /* * The two PCIe units are accessible through From 599f7aa541bb5a658cbfd2af73bd9d2f6e828d43 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Mon, 18 Mar 2019 20:51:58 +1300 Subject: [PATCH 10/10] ARM: kirkwood: disable dcache for Kirkwood boards Prior to commit 93b283d49f93 ("ARM: CPU: arm926ejs: Consolidate cache routines to common file") the kirkwood boards didn't have and dcache support. The network and usb drivers rely on this. Set CONFIG_SYS_DCACHE_OFF in the Kirkwood specific config.h. Reported-by: Leigh Brown Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- arch/arm/mach-kirkwood/include/mach/config.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index fcd903887b..aea60688c2 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -26,6 +26,12 @@ #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ #define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ +/* + * Disable the dcache. Currently the network driver (mvgbe.c) and USB + * EHCI driver (ehci-marvell.c) and possibly others rely on the data + * cache being disabled. + */ +#define CONFIG_SYS_DCACHE_OFF /* * By default kwbimage.cfg from board specific folder is used