mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-21 14:41:31 +00:00
mxc: Fix SDHC multi-instance clock
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not suitable for the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). This patch fixes this issue by adding a configuration field for the SDHC input clock frequency. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Andy Fleming <afleming@gmail.com>
This commit is contained in:
parent
6e3dc12754
commit
a2ac1b3a7d
15 changed files with 40 additions and 2 deletions
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@ -217,6 +217,7 @@ int board_mmc_init(bd_t *bis)
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PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_PULL |
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PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH | PAD_CTL_PUE_PULL |
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PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU);
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PAD_CTL_PKE_ENABLE | PAD_CTL_HYS_ENABLE | PAD_CTL_47K_PU);
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esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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return fsl_esdhc_initialize(bis, &esdhc_cfg);
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return fsl_esdhc_initialize(bis, &esdhc_cfg);
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}
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}
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#endif
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#endif
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@ -27,6 +27,7 @@
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#include <asm/errno.h>
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#include <asm/errno.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/mx35_pins.h>
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#include <asm/arch/mx35_pins.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/iomux.h>
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#include <i2c.h>
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#include <i2c.h>
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@ -292,6 +293,7 @@ int board_mmc_init(bd_t *bis)
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mxc_request_iomux(MX35_PIN_SD1_DATA2, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_SD1_DATA2, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_SD1_DATA3, MUX_CONFIG_FUNC);
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mxc_request_iomux(MX35_PIN_SD1_DATA3, MUX_CONFIG_FUNC);
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esdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
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return fsl_esdhc_initialize(bis, &esdhc_cfg);
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return fsl_esdhc_initialize(bis, &esdhc_cfg);
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}
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}
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@ -29,6 +29,7 @@
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#include <asm/errno.h>
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#include <asm/errno.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/clock.h>
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#include <i2c.h>
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#include <i2c.h>
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#include <mmc.h>
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#include <mmc.h>
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#include <fsl_esdhc.h>
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#include <fsl_esdhc.h>
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@ -358,6 +359,9 @@ int board_mmc_init(bd_t *bis)
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u32 index;
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u32 index;
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s32 status = 0;
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s32 status = 0;
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esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM;
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for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM;
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index++) {
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index++) {
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switch (index) {
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switch (index) {
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@ -26,6 +26,7 @@
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#include <asm/arch/mx5x_pins.h>
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#include <asm/arch/mx5x_pins.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/iomux.h>
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#include <asm/errno.h>
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#include <asm/errno.h>
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#include <netdev.h>
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#include <netdev.h>
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@ -106,6 +107,9 @@ int board_mmc_init(bd_t *bis)
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u32 index;
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u32 index;
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s32 status = 0;
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s32 status = 0;
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esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
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for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
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switch (index) {
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switch (index) {
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case 0:
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case 0:
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@ -26,6 +26,7 @@
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#include <asm/arch/mx5x_pins.h>
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#include <asm/arch/mx5x_pins.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/iomux.h>
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#include <asm/errno.h>
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#include <asm/errno.h>
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#include <asm/imx-common/boot_mode.h>
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#include <asm/imx-common/boot_mode.h>
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@ -232,6 +233,9 @@ int board_mmc_init(bd_t *bis)
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u32 index;
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u32 index;
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s32 status = 0;
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s32 status = 0;
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esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
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for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
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switch (index) {
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switch (index) {
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case 0:
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case 0:
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@ -192,6 +192,9 @@ int board_mmc_init(bd_t *bis)
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u32 index;
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u32 index;
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s32 status = 0;
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s32 status = 0;
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esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
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for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
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switch (index) {
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switch (index) {
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case 0:
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case 0:
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@ -26,6 +26,7 @@
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#include <asm/arch/mx5x_pins.h>
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#include <asm/arch/mx5x_pins.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/iomux.h>
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#include <asm/errno.h>
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#include <asm/errno.h>
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#include <netdev.h>
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#include <netdev.h>
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@ -144,6 +145,8 @@ int board_mmc_init(bd_t *bis)
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u32 index;
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u32 index;
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s32 status = 0;
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s32 status = 0;
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esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
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for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
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switch (index) {
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switch (index) {
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case 0:
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case 0:
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@ -24,6 +24,7 @@
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mx6x_pins.h>
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#include <asm/arch/mx6x_pins.h>
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#include <asm/arch/clock.h>
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#include <asm/errno.h>
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#include <asm/errno.h>
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#include <asm/gpio.h>
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#include <asm/gpio.h>
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#include <asm/imx-common/iomux-v3.h>
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#include <asm/imx-common/iomux-v3.h>
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@ -139,6 +140,9 @@ int board_mmc_init(bd_t *bis)
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s32 status = 0;
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s32 status = 0;
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u32 index = 0;
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u32 index = 0;
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
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for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
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for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
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switch (index) {
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switch (index) {
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case 0:
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case 0:
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@ -114,6 +114,7 @@ int board_mmc_init(bd_t *bis)
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{
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{
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imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
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imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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}
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}
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#endif
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#endif
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@ -264,6 +264,9 @@ int board_mmc_init(bd_t *bis)
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s32 status = 0;
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s32 status = 0;
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u32 index = 0;
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u32 index = 0;
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
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for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
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for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
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switch (index) {
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switch (index) {
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case 0:
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case 0:
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@ -120,6 +120,7 @@ int board_mmc_init(bd_t *bis)
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{
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{
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imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
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imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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}
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}
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#endif
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#endif
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@ -29,6 +29,7 @@
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#include <asm/errno.h>
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#include <asm/errno.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/clock.h>
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#include <i2c.h>
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#include <i2c.h>
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#include <mmc.h>
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#include <mmc.h>
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#include <fsl_esdhc.h>
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#include <fsl_esdhc.h>
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@ -349,6 +350,9 @@ int board_mmc_init(bd_t *bis)
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gpio_direction_input(EFIKASB_SDHC1_CD);
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gpio_direction_input(EFIKASB_SDHC1_CD);
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}
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}
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esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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esdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
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ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
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if (machine_is_efikasb()) {
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if (machine_is_efikasb()) {
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@ -28,6 +28,7 @@
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mx5x_pins.h>
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#include <asm/arch/mx5x_pins.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/iomux.h>
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#include <asm/gpio.h>
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#include <asm/gpio.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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mxc_iomux_set_pad(MX51_PIN_GPIO1_1,
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mxc_iomux_set_pad(MX51_PIN_GPIO1_1,
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PAD_CTL_HYS_ENABLE);
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PAD_CTL_HYS_ENABLE);
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esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
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return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
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}
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}
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#endif
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#endif
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@ -410,12 +410,12 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
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return 0;
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return 0;
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}
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}
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void set_sysctl(struct mmc *mmc, uint clock)
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static void set_sysctl(struct mmc *mmc, uint clock)
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{
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{
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int sdhc_clk = gd->sdhc_clk;
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int div, pre_div;
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int div, pre_div;
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
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volatile struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
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int sdhc_clk = cfg->sdhc_clk;
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uint clk;
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uint clk;
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if (clock < mmc->f_min)
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if (clock < mmc->f_min)
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cfg = malloc(sizeof(struct fsl_esdhc_cfg));
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cfg = malloc(sizeof(struct fsl_esdhc_cfg));
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memset(cfg, 0, sizeof(struct fsl_esdhc_cfg));
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memset(cfg, 0, sizeof(struct fsl_esdhc_cfg));
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cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
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cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
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cfg->sdhc_clk = gd->sdhc_clk;
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return fsl_esdhc_initialize(bis, cfg);
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return fsl_esdhc_initialize(bis, cfg);
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}
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}
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struct fsl_esdhc_cfg {
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struct fsl_esdhc_cfg {
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u32 esdhc_base;
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u32 esdhc_base;
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u32 sdhc_clk;
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};
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};
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/* Select the correct accessors depending on endianess */
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/* Select the correct accessors depending on endianess */
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