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https://github.com/Fishwaldo/u-boot.git
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Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx
This commit is contained in:
commit
a524e112b4
8 changed files with 27 additions and 4 deletions
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@ -19,6 +19,7 @@
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*
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*
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*/
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*/
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#include <asm/types.h>
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#include <asm/u-boot.h>
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#include <asm/u-boot.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <common.h>
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#include <common.h>
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@ -1,3 +1,4 @@
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#include <asm/types.h>
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#include <asm/u-boot.h>
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#include <asm/u-boot.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <common.h>
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#include <common.h>
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@ -28,6 +28,7 @@
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* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
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* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
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*/
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*/
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#include <asm/types.h>
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#include <asm/u-boot.h>
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#include <asm/u-boot.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <ppc4xx.h>
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#include <ppc4xx.h>
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@ -19,6 +19,7 @@
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*
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*
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*/
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*/
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#include <asm/types.h>
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#include <asm/u-boot.h>
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#include <asm/u-boot.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <common.h>
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#include <common.h>
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@ -36,6 +36,7 @@
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*
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*
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*/
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*/
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#include <asm/types.h>
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#include <asm/u-boot.h>
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#include <asm/u-boot.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <common.h>
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#include <common.h>
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@ -138,8 +138,8 @@ void reconfigure_pll(u32 new_cpu_freq)
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void
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void
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cpu_init_f (void)
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cpu_init_f (void)
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{
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{
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#if defined(CONFIG_WATCHDOG)
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#if defined(CONFIG_WATCHDOG) || defined(CONFIG_460EX)
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unsigned long val;
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u32 val;
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#endif
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#endif
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reconfigure_pll(CFG_PLL_RECONFIG);
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reconfigure_pll(CFG_PLL_RECONFIG);
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@ -272,6 +272,22 @@ cpu_init_f (void)
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reset_4xx_watchdog();
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reset_4xx_watchdog();
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#endif /* CONFIG_WATCHDOG */
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#endif /* CONFIG_WATCHDOG */
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#if defined(CONFIG_460EX)
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/*
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* Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and
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* clear SDR0_AHB_CFG[A2P_PROT2] (bit 25) for a new 460EX errata
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* regarding concurrent use of AHB USB OTG, USB 2.0 host and SATA
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*/
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mfsdr(SDR0_AHB_CFG, val);
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val |= 0x80;
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val &= ~0x40;
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mtsdr(SDR0_AHB_CFG, val);
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mfsdr(SDR0_USB2HOST_CFG, val);
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val &= ~0xf00;
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val |= 0x400;
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mtsdr(SDR0_USB2HOST_CFG, val);
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#endif /* CONFIG_460EX */
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}
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}
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/*
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/*
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@ -1,5 +1,5 @@
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/*
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/*
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* (C) Copyright 2007
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* (C) Copyright 2007-2008
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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*
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* See file CREDITS for list of people who contributed to this
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* See file CREDITS for list of people who contributed to this
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@ -52,7 +52,7 @@ void gpio_config(int pin, int in_out, int gpio_alt, int out_val)
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}
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}
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mask = 0x80000000 >> pin;
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mask = 0x80000000 >> pin;
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mask2 = 0xc0000000 >> (pin2 << 1);
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mask2 = 0xc0000000 >> pin2;
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/* first set TCR to 0 */
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/* first set TCR to 0 */
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out_be32((void *)GPIO0_TCR + offs, in_be32((void *)GPIO0_TCR + offs) & ~mask);
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out_be32((void *)GPIO0_TCR + offs, in_be32((void *)GPIO0_TCR + offs) & ~mask);
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@ -2471,6 +2471,8 @@
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#define AHB_TOP 0xA4
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#define AHB_TOP 0xA4
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#define AHB_BOT 0xA5
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#define AHB_BOT 0xA5
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#define SDR0_AHB_CFG 0x370
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#define SDR0_USB2HOST_CFG 0x371
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#endif /* CONFIG_460EX || CONFIG_460GT */
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#endif /* CONFIG_460EX || CONFIG_460GT */
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#define SDR0_SDCS_SDD (0x80000000 >> 31)
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#define SDR0_SDCS_SDD (0x80000000 >> 31)
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