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spi: ti_qspi: dra7xx: Add support to use 76.8MHz clock

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According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, update
the driver to use the same.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
This commit is contained in:
Vignesh R 2016-07-25 15:45:45 +05:30 • committed by Jagan Teki
parent 4d790788ce
commit a6f56ad1ee
1 changed files with 12 additions and 5 deletions
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17
drivers/spi/ti_qspi.c
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@ -21,7 +21,8 @@ DECLARE_GLOBAL_DATA_PTR;
/* ti qpsi register bit masks */ /* ti qpsi register bit masks */
#define QSPI_TIMEOUT 2000000 #define QSPI_TIMEOUT 2000000
#define QSPI_FCLK 192000000 #define QSPI_FCLK 192000000
#define QSPI_DRA7XX_FCLK 76800000
/* clock control */ /* clock control */
#define QSPI_CLK_EN BIT(31) #define QSPI_CLK_EN BIT(31)
#define QSPI_CLK_DIV_MAX 0xffff #define QSPI_CLK_DIV_MAX 0xffff
@ -101,6 +102,7 @@ struct ti_qspi_priv {
#endif #endif
struct ti_qspi_regs *base; struct ti_qspi_regs *base;
void *ctrl_mod_mmap; void *ctrl_mod_mmap;
ulong fclk;
unsigned int mode; unsigned int mode;
u32 cmd; u32 cmd;
u32 dc; u32 dc;
@ -113,7 +115,7 @@ static void ti_spi_set_speed(struct ti_qspi_priv *priv, uint hz)
if (!hz) if (!hz)
clk_div = 0; clk_div = 0;
else else
clk_div = (QSPI_FCLK / hz) - 1; clk_div = (priv->fclk / hz) - 1;
debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div); debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div);
@ -366,8 +368,10 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) #if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
priv->ctrl_mod_mmap = (void *)CORE_CTRL_IO; priv->ctrl_mod_mmap = (void *)CORE_CTRL_IO;
priv->slave.memory_map = (void *)MMAP_START_ADDR_DRA; priv->slave.memory_map = (void *)MMAP_START_ADDR_DRA;
priv->fclk = QSPI_DRA7XX_FCLK;
#else #else
priv->slave.memory_map = (void *)MMAP_START_ADDR_AM43x; priv->slave.memory_map = (void *)MMAP_START_ADDR_AM43x;
priv->fclk = QSPI_FCLK;
#endif #endif
ti_spi_set_speed(priv, max_hz); ti_spi_set_speed(priv, max_hz);
@ -520,7 +524,10 @@ static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen,
static int ti_qspi_probe(struct udevice *bus) static int ti_qspi_probe(struct udevice *bus)
{ {
/* Nothing to do in probe */ struct ti_qspi_priv *priv = dev_get_priv(bus);
priv->fclk = dev_get_driver_data(bus);
return 0; return 0;
} }
@ -572,8 +579,8 @@ static const struct dm_spi_ops ti_qspi_ops = {
}; };
static const struct udevice_id ti_qspi_ids[] = { static const struct udevice_id ti_qspi_ids[] = {
{ .compatible = "ti,dra7xxx-qspi" }, { .compatible = "ti,dra7xxx-qspi", .data = QSPI_DRA7XX_FCLK},
{ .compatible = "ti,am4372-qspi" }, { .compatible = "ti,am4372-qspi", .data = QSPI_FCLK},
{ } { }
}; };