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https://github.com/Fishwaldo/u-boot.git
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board/mpl: Remove mpl-specific memory test command
The mpl-specfic memory test is only documented for one board, doesn't compile cleanly, uses improper coding style, and overlaps functionality with U-Boot's common 'mtest' command, so lets get rid of it. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: d.peter@mpl.ch CC: d.mueller@elsoft.ch CC: wd@denx.de
This commit is contained in:
Peter Tyser
Wolfgang Denk
parent
a2f69d35f9
commit
a7d54346e0
7 changed files with 8 additions and 598 deletions
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@ -430,12 +430,12 @@ void check_env(void)
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int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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{
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ulong size,src,ld_addr;
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ulong ld_addr;
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int result;
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int result;
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#if !defined(CONFIG_PATI)
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#if !defined(CONFIG_PATI)
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ulong size = IMAGE_SIZE;
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ulong src = MULTI_PURPOSE_SOCKET_ADDR;
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backup_t back;
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backup_t back;
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src = MULTI_PURPOSE_SOCKET_ADDR;
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size = IMAGE_SIZE;
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#endif
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#endif
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if (strcmp(argv[1], "flash") == 0)
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if (strcmp(argv[1], "flash") == 0)
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@ -480,30 +480,6 @@ int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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}
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}
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#endif /* #if !defined(CONFIG_PATI) */
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#endif /* #if !defined(CONFIG_PATI) */
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}
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}
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if (strcmp(argv[1], "mem") == 0)
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{
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result=0;
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if(argc==3)
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{
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result = (int)simple_strtol(argv[2], NULL, 16);
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}
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src=(unsigned long)&result;
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src-=CONFIG_SYS_MEMTEST_START;
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src-=(100*1024); /* - 100k */
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src&=0xfff00000;
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size=0;
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do {
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size++;
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printf("\n\nPass %ld\n",size);
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mem_test(CONFIG_SYS_MEMTEST_START,src,1);
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if(ctrlc())
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break;
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if(result>0)
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result--;
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}while(result);
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return 0;
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}
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#if !defined(CONFIG_PATI)
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#if !defined(CONFIG_PATI)
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if (strcmp(argv[1], "clearenvvalues") == 0)
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if (strcmp(argv[1], "clearenvvalues") == 0)
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{
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{
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@ -1,565 +0,0 @@
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/*
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* (C) Copyright 2001
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* Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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/* NOT Used yet...
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add following code to PIP405.c :
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int testdram (void)
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{
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unsigned char s[32];
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int i;
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i = getenv_f("testmem", s, 32);
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if (i != 0) {
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i = (int) simple_strtoul (s, NULL, 10);
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if ((i > 0) && (i < 0xf)) {
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printf ("testing ");
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i = mem_test (0, ramsize, i);
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if (i > 0)
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printf ("ERROR ");
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else
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printf ("Ok ");
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}
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}
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return (1);
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}
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/ppc4xx-i2c.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define FALSE 0
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#define TRUE 1
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#define TEST_QUIET 8
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#define TEST_SHOW_PROG 4
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#define TEST_SHOW_ERR 2
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#define TEST_SHOW_ALL 1
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#define TESTPAT1 0xAA55AA55
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#define TESTPAT2 0x55AA55AA
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#define TEST_PASSED 0
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#define TEST_FAILED 1
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#define MEGABYTE (1024*1024)
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typedef struct {
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volatile unsigned long pat1;
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volatile unsigned long pat2;
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} RAM_MEMTEST_PATTERN2;
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typedef struct {
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volatile unsigned long addr;
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} RAM_MEMTEST_ADDRLINE;
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static __inline unsigned long Swap_32 (unsigned long val)
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{
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return (((val << 16) & 0xFFFF0000) | ((val >> 16) & 0x0000FFFF));
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}
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void testm_puts (int quiet, char *buf)
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{
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if ((quiet & TEST_SHOW_ALL) == TEST_SHOW_ALL)
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puts (buf);
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}
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void Write_Error (int mode, unsigned long addr, unsigned long expected,
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unsigned long actual)
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{
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char dispbuf[64];
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sprintf (dispbuf, "\n ERROR @ 0x%08lX: (exp: 0x%08lX act: 0x%08lX) ",
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addr, expected, actual);
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testm_puts (((mode & TEST_SHOW_ERR) ==
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TEST_SHOW_ERR) ? TEST_SHOW_ALL : mode, dispbuf);
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}
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/*
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* fills the memblock of <size> bytes from <startaddr> with pat1 and pat2
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*/
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void RAM_MemTest_WritePattern2 (unsigned long startaddr,
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unsigned long size, unsigned long pat1,
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unsigned long pat2)
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{
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RAM_MEMTEST_PATTERN2 *p, *pe;
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p = (RAM_MEMTEST_PATTERN2 *) startaddr;
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pe = (RAM_MEMTEST_PATTERN2 *) (startaddr + size);
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while (p < pe) {
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p->pat1 = pat1;
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p->pat2 = pat2;
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p++;
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} /* endwhile */
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}
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/*
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* checks the memblock of <size> bytes from <startaddr> with pat1 and pat2
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* returns the address of the first error or NULL if all is well
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*/
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void *RAM_MemTest_CheckPattern2 (int mode, unsigned long startaddr,
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unsigned long size, unsigned long pat1,
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unsigned long pat2)
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{
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RAM_MEMTEST_PATTERN2 *p, *pe;
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unsigned long actual1, actual2;
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p = (RAM_MEMTEST_PATTERN2 *) startaddr;
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pe = (RAM_MEMTEST_PATTERN2 *) (startaddr + size);
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while (p < pe) {
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actual1 = p->pat1;
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actual2 = p->pat2;
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if (actual1 != pat1) {
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Write_Error (mode, (unsigned long) &(p->pat1), pat1, actual1);
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return ((void *) &(p->pat1));
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}
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/* endif */
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if (actual2 != pat2) {
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Write_Error (mode, (unsigned long) &(p->pat2), pat2, actual2);
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return ((void *) &(p->pat2));
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}
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/* endif */
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p++;
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} /* endwhile */
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return (NULL);
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}
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/*
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* fills the memblock of <size> bytes from <startaddr> with the address
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*/
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void RAM_MemTest_WriteAddrLine (unsigned long startaddr,
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unsigned long size, int swapped)
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{
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RAM_MEMTEST_ADDRLINE *p, *pe;
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p = (RAM_MEMTEST_ADDRLINE *) startaddr;
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pe = (RAM_MEMTEST_ADDRLINE *) (startaddr + size);
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if (!swapped) {
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while (p < pe) {
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p->addr = (unsigned long) p;
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p++;
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} /* endwhile */
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} else {
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while (p < pe) {
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p->addr = Swap_32 ((unsigned long) p);
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p++;
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} /* endwhile */
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} /* endif */
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}
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/*
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* checks the memblock of <size> bytes from <startaddr>
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* returns the address of the error or NULL if all is well
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*/
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void *RAM_MemTest_CheckAddrLine (int mode, unsigned long startaddr,
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unsigned long size, int swapped)
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{
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RAM_MEMTEST_ADDRLINE *p, *pe;
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unsigned long actual, expected;
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p = (RAM_MEMTEST_ADDRLINE *) startaddr;
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pe = (RAM_MEMTEST_ADDRLINE *) (startaddr + size);
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if (!swapped) {
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while (p < pe) {
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actual = p->addr;
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expected = (unsigned long) p;
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if (actual != expected) {
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Write_Error (mode, (unsigned long) &(p->addr), expected,
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actual);
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return ((void *) &(p->addr));
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} /* endif */
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p++;
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} /* endwhile */
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} else {
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while (p < pe) {
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actual = p->addr;
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expected = Swap_32 ((unsigned long) p);
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if (actual != expected) {
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Write_Error (mode, (unsigned long) &(p->addr), expected,
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actual);
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return ((void *) &(p->addr));
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} /* endif */
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p++;
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} /* endwhile */
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} /* endif */
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return (NULL);
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}
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/*
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* checks the memblock of <size> bytes from <startaddr+size>
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* returns the address of the error or NULL if all is well
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*/
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void *RAM_MemTest_CheckAddrLineReverse (int mode, unsigned long startaddr,
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unsigned long size, int swapped)
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{
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RAM_MEMTEST_ADDRLINE *p, *pe;
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unsigned long actual, expected;
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p = (RAM_MEMTEST_ADDRLINE *) (startaddr + size - sizeof (p->addr));
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pe = (RAM_MEMTEST_ADDRLINE *) startaddr;
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if (!swapped) {
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while (p > pe) {
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actual = p->addr;
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expected = (unsigned long) p;
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if (actual != expected) {
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Write_Error (mode, (unsigned long) &(p->addr), expected,
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actual);
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return ((void *) &(p->addr));
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} /* endif */
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p--;
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} /* endwhile */
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} else {
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while (p > pe) {
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actual = p->addr;
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expected = Swap_32 ((unsigned long) p);
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if (actual != expected) {
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Write_Error (mode, (unsigned long) &(p->addr), expected,
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actual);
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return ((void *) &(p->addr));
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} /* endif */
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p--;
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} /* endwhile */
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} /* endif */
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return (NULL);
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}
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/*
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* fills the memblock of <size> bytes from <startaddr> with walking bit pattern
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*/
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void RAM_MemTest_WriteWalkBit (unsigned long startaddr, unsigned long size)
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{
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volatile unsigned long *p, *pe;
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unsigned long i;
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p = (unsigned long *) startaddr;
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pe = (unsigned long *) (startaddr + size);
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i = 0;
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while (p < pe) {
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*p = 1UL << i;
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i = (i + 1 + (((unsigned long) p) >> 7)) % 32;
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p++;
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} /* endwhile */
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}
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/*
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* checks the memblock of <size> bytes from <startaddr>
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* returns the address of the error or NULL if all is well
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*/
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void *RAM_MemTest_CheckWalkBit (int mode, unsigned long startaddr,
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unsigned long size)
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{
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volatile unsigned long *p, *pe;
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unsigned long actual, expected;
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unsigned long i;
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p = (unsigned long *) startaddr;
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pe = (unsigned long *) (startaddr + size);
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i = 0;
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while (p < pe) {
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actual = *p;
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expected = (1UL << i);
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if (actual != expected) {
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Write_Error (mode, (unsigned long) p, expected, actual);
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return ((void *) p);
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} /* endif */
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i = (i + 1 + (((unsigned long) p) >> 7)) % 32;
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p++;
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} /* endwhile */
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return (NULL);
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}
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/*
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* fills the memblock of <size> bytes from <startaddr> with "random" pattern
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*/
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void RAM_MemTest_WriteRandomPattern (unsigned long startaddr,
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unsigned long size,
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unsigned long *pat)
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{
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unsigned long i, p;
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p = *pat;
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for (i = 0; i < (size / 4); i++) {
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*(unsigned long *) (startaddr + i * 4) = p;
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if ((p % 2) > 0) {
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p ^= i;
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p >>= 1;
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p |= 0x80000000;
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} else {
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p ^= ~i;
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p >>= 1;
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} /* endif */
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} /* endfor */
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*pat = p;
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}
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/*
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* checks the memblock of <size> bytes from <startaddr>
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* returns the address of the error or NULL if all is well
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*/
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void *RAM_MemTest_CheckRandomPattern (int mode, unsigned long startaddr,
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unsigned long size,
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unsigned long *pat)
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{
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void *perr = NULL;
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unsigned long i, p, p1;
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p = *pat;
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for (i = 0; i < (size / 4); i++) {
|
|
||||||
p1 = *(unsigned long *) (startaddr + i * 4);
|
|
||||||
if (p1 != p) {
|
|
||||||
if (perr == NULL) {
|
|
||||||
Write_Error (mode, startaddr + i * 4, p, p1);
|
|
||||||
perr = (void *) (startaddr + i * 4);
|
|
||||||
} /* endif */
|
|
||||||
}
|
|
||||||
/* endif */
|
|
||||||
if ((p % 2) > 0) {
|
|
||||||
p ^= i;
|
|
||||||
p >>= 1;
|
|
||||||
p |= 0x80000000;
|
|
||||||
} else {
|
|
||||||
p ^= ~i;
|
|
||||||
p >>= 1;
|
|
||||||
} /* endif */
|
|
||||||
} /* endfor */
|
|
||||||
|
|
||||||
*pat = p;
|
|
||||||
return (perr);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void RAM_MemTest_WriteData1 (unsigned long startaddr, unsigned long size,
|
|
||||||
unsigned long *pat)
|
|
||||||
{
|
|
||||||
RAM_MemTest_WritePattern2 (startaddr, size, TESTPAT1, TESTPAT2);
|
|
||||||
}
|
|
||||||
|
|
||||||
void *RAM_MemTest_CheckData1 (int mode, unsigned long startaddr,
|
|
||||||
unsigned long size, unsigned long *pat)
|
|
||||||
{
|
|
||||||
return (RAM_MemTest_CheckPattern2
|
|
||||||
(mode, startaddr, size, TESTPAT1, TESTPAT2));
|
|
||||||
}
|
|
||||||
|
|
||||||
void RAM_MemTest_WriteData2 (unsigned long startaddr, unsigned long size,
|
|
||||||
unsigned long *pat)
|
|
||||||
{
|
|
||||||
RAM_MemTest_WritePattern2 (startaddr, size, TESTPAT2, TESTPAT1);
|
|
||||||
}
|
|
||||||
|
|
||||||
void *RAM_MemTest_CheckData2 (int mode, unsigned long startaddr,
|
|
||||||
unsigned long size, unsigned long *pat)
|
|
||||||
{
|
|
||||||
return (RAM_MemTest_CheckPattern2
|
|
||||||
(mode, startaddr, size, TESTPAT2, TESTPAT1));
|
|
||||||
}
|
|
||||||
|
|
||||||
void RAM_MemTest_WriteAddr1 (unsigned long startaddr, unsigned long size,
|
|
||||||
unsigned long *pat)
|
|
||||||
{
|
|
||||||
RAM_MemTest_WriteAddrLine (startaddr, size, FALSE);
|
|
||||||
}
|
|
||||||
|
|
||||||
void *RAM_MemTest_Check1Addr1 (int mode, unsigned long startaddr,
|
|
||||||
unsigned long size, unsigned long *pat)
|
|
||||||
{
|
|
||||||
return (RAM_MemTest_CheckAddrLine (mode, startaddr, size, FALSE));
|
|
||||||
}
|
|
||||||
|
|
||||||
void *RAM_MemTest_Check2Addr1 (int mode, unsigned long startaddr,
|
|
||||||
unsigned long size, unsigned long *pat)
|
|
||||||
{
|
|
||||||
return (RAM_MemTest_CheckAddrLineReverse
|
|
||||||
(mode, startaddr, size, FALSE));
|
|
||||||
}
|
|
||||||
|
|
||||||
void RAM_MemTest_WriteAddr2 (unsigned long startaddr, unsigned long size,
|
|
||||||
unsigned long *pat)
|
|
||||||
{
|
|
||||||
RAM_MemTest_WriteAddrLine (startaddr, size, TRUE);
|
|
||||||
}
|
|
||||||
|
|
||||||
void *RAM_MemTest_Check1Addr2 (int mode, unsigned long startaddr,
|
|
||||||
unsigned long size, unsigned long *pat)
|
|
||||||
{
|
|
||||||
return (RAM_MemTest_CheckAddrLine (mode, startaddr, size, TRUE));
|
|
||||||
}
|
|
||||||
|
|
||||||
void *RAM_MemTest_Check2Addr2 (int mode, unsigned long startaddr,
|
|
||||||
unsigned long size, unsigned long *pat)
|
|
||||||
{
|
|
||||||
return (RAM_MemTest_CheckAddrLineReverse
|
|
||||||
(mode, startaddr, size, TRUE));
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
void (*test_write) (unsigned long startaddr, unsigned long size,
|
|
||||||
unsigned long *pat);
|
|
||||||
char *test_write_desc;
|
|
||||||
void *(*test_check1) (int mode, unsigned long startaddr,
|
|
||||||
unsigned long size, unsigned long *pat);
|
|
||||||
void *(*test_check2) (int mode, unsigned long startaddr,
|
|
||||||
unsigned long size, unsigned long *pat);
|
|
||||||
} RAM_MEMTEST_FUNC;
|
|
||||||
|
|
||||||
|
|
||||||
#define TEST_STAGES 5
|
|
||||||
static RAM_MEMTEST_FUNC test_stage[TEST_STAGES] = {
|
|
||||||
{RAM_MemTest_WriteData1, "data test 1...\n", RAM_MemTest_CheckData1,
|
|
||||||
NULL},
|
|
||||||
{RAM_MemTest_WriteData2, "data test 2...\n", RAM_MemTest_CheckData2,
|
|
||||||
NULL},
|
|
||||||
{RAM_MemTest_WriteAddr1, "address line test...\n",
|
|
||||||
RAM_MemTest_Check1Addr1, RAM_MemTest_Check2Addr1},
|
|
||||||
{RAM_MemTest_WriteAddr2, "address line test (swapped)...\n",
|
|
||||||
RAM_MemTest_Check1Addr2, RAM_MemTest_Check2Addr2},
|
|
||||||
{RAM_MemTest_WriteRandomPattern, "random data test...\n",
|
|
||||||
RAM_MemTest_CheckRandomPattern, NULL}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
int mem_test (unsigned long start, unsigned long ramsize, int quiet)
|
|
||||||
{
|
|
||||||
unsigned long errors, stage;
|
|
||||||
unsigned long startaddr, size, i;
|
|
||||||
const unsigned long blocksize = 0x80000; /* check in 512KB blocks */
|
|
||||||
unsigned long *perr;
|
|
||||||
unsigned long rdatapat;
|
|
||||||
char dispbuf[80];
|
|
||||||
int status = TEST_PASSED;
|
|
||||||
int prog = 0;
|
|
||||||
|
|
||||||
errors = 0;
|
|
||||||
startaddr = start;
|
|
||||||
size = ramsize;
|
|
||||||
if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
|
|
||||||
prog++;
|
|
||||||
printf (".");
|
|
||||||
}
|
|
||||||
sprintf (dispbuf, "\nMemory Test: addr = 0x%lx size = 0x%lx\n",
|
|
||||||
startaddr, size);
|
|
||||||
testm_puts (quiet, dispbuf);
|
|
||||||
for (stage = 0; stage < TEST_STAGES; stage++) {
|
|
||||||
sprintf (dispbuf, test_stage[stage].test_write_desc);
|
|
||||||
testm_puts (quiet, dispbuf);
|
|
||||||
/* fill SDRAM */
|
|
||||||
rdatapat = 0x12345678;
|
|
||||||
sprintf (dispbuf, "writing block: ");
|
|
||||||
testm_puts (quiet, dispbuf);
|
|
||||||
for (i = 0; i < size; i += blocksize) {
|
|
||||||
sprintf (dispbuf, "%04lX\b\b\b\b", i / blocksize);
|
|
||||||
testm_puts (quiet, dispbuf);
|
|
||||||
test_stage[stage].test_write (startaddr + i, blocksize,
|
|
||||||
&rdatapat);
|
|
||||||
} /* endfor */
|
|
||||||
sprintf (dispbuf, "\n");
|
|
||||||
testm_puts (quiet, dispbuf);
|
|
||||||
if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
|
|
||||||
prog++;
|
|
||||||
printf (".");
|
|
||||||
}
|
|
||||||
/* check SDRAM */
|
|
||||||
rdatapat = 0x12345678;
|
|
||||||
sprintf (dispbuf, "checking block: ");
|
|
||||||
testm_puts (quiet, dispbuf);
|
|
||||||
for (i = 0; i < size; i += blocksize) {
|
|
||||||
sprintf (dispbuf, "%04lX\b\b\b\b", i / blocksize);
|
|
||||||
testm_puts (quiet, dispbuf);
|
|
||||||
if ((perr =
|
|
||||||
test_stage[stage].test_check1 (quiet, startaddr + i,
|
|
||||||
blocksize,
|
|
||||||
&rdatapat)) != NULL) {
|
|
||||||
status = TEST_FAILED;
|
|
||||||
} /* endif */
|
|
||||||
} /* endfor */
|
|
||||||
sprintf (dispbuf, "\n");
|
|
||||||
testm_puts (quiet, dispbuf);
|
|
||||||
if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
|
|
||||||
prog++;
|
|
||||||
printf (".");
|
|
||||||
}
|
|
||||||
if (test_stage[stage].test_check2 != NULL) {
|
|
||||||
/* check2 SDRAM */
|
|
||||||
sprintf (dispbuf, "2nd checking block: ");
|
|
||||||
rdatapat = 0x12345678;
|
|
||||||
testm_puts (quiet, dispbuf);
|
|
||||||
for (i = 0; i < size; i += blocksize) {
|
|
||||||
sprintf (dispbuf, "%04lX\b\b\b\b", i / blocksize);
|
|
||||||
testm_puts (quiet, dispbuf);
|
|
||||||
if ((perr =
|
|
||||||
test_stage[stage].test_check2 (quiet, startaddr + i,
|
|
||||||
blocksize,
|
|
||||||
&rdatapat)) != NULL) {
|
|
||||||
status = TEST_FAILED;
|
|
||||||
} /* endif */
|
|
||||||
} /* endfor */
|
|
||||||
sprintf (dispbuf, "\n");
|
|
||||||
testm_puts (quiet, dispbuf);
|
|
||||||
if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
|
|
||||||
prog++;
|
|
||||||
printf (".");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
} /* next stage */
|
|
||||||
if ((quiet & TEST_SHOW_PROG) == TEST_SHOW_PROG) {
|
|
||||||
while (prog-- > 0)
|
|
||||||
printf ("\b \b");
|
|
||||||
}
|
|
||||||
|
|
||||||
if (status == TEST_FAILED)
|
|
||||||
errors++;
|
|
||||||
|
|
||||||
return (errors);
|
|
||||||
}
|
|
||||||
|
|
@ -29,7 +29,7 @@ endif
|
||||||
LIB = $(obj)lib$(BOARD).a
|
LIB = $(obj)lib$(BOARD).a
|
||||||
|
|
||||||
COBJS = $(BOARD).o ../common/flash.o cmd_mip405.o ../common/pci.o \
|
COBJS = $(BOARD).o ../common/flash.o cmd_mip405.o ../common/pci.o \
|
||||||
../common/usb_uhci.o ../common/memtst.o ../common/common_util.o
|
../common/usb_uhci.o ../common/common_util.o
|
||||||
|
|
||||||
SOBJS = init.o
|
SOBJS = init.o
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -59,8 +59,7 @@ U_BOOT_CMD(
|
||||||
"flash mem [SrcAddr] - updates U-Boot with image in memory\n"
|
"flash mem [SrcAddr] - updates U-Boot with image in memory\n"
|
||||||
"mip405 flash mps - updates U-Boot with image from MPS\n"
|
"mip405 flash mps - updates U-Boot with image from MPS\n"
|
||||||
"mip405 info - displays board information\n"
|
"mip405 info - displays board information\n"
|
||||||
"mip405 led <on> - switches LED on (on=1) or off (on=0)\n"
|
"mip405 led <on> - switches LED on (on=1) or off (on=0)"
|
||||||
"mip405 mem [cnt] - Memory Test <cnt>-times, <cnt> = -1 loop forever"
|
|
||||||
);
|
);
|
||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
|
|
|
||||||
|
|
@ -28,7 +28,7 @@ endif
|
||||||
|
|
||||||
LIB = $(obj)lib$(BOARD).a
|
LIB = $(obj)lib$(BOARD).a
|
||||||
|
|
||||||
COBJS := pati.o ../common/flash.o ../common/memtst.o cmd_pati.o ../common/common_util.o
|
COBJS := pati.o ../common/flash.o cmd_pati.o ../common/common_util.o
|
||||||
#### cmd_pati.o
|
#### cmd_pati.o
|
||||||
|
|
||||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||||
|
|
|
||||||
|
|
@ -32,7 +32,7 @@ COBJS = $(BOARD).o \
|
||||||
../common/flash.o cmd_pip405.o ../common/pci.o \
|
../common/flash.o cmd_pip405.o ../common/pci.o \
|
||||||
../common/isa.o ../common/kbd.o \
|
../common/isa.o ../common/kbd.o \
|
||||||
../common/usb_uhci.o \
|
../common/usb_uhci.o \
|
||||||
../common/memtst.o ../common/common_util.o
|
../common/common_util.o
|
||||||
|
|
||||||
SOBJS = init.o
|
SOBJS = init.o
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -29,7 +29,7 @@ endif
|
||||||
LIB = $(obj)lib$(BOARD).a
|
LIB = $(obj)lib$(BOARD).a
|
||||||
|
|
||||||
COBJS := vcma9.o flash.o cmd_vcma9.o
|
COBJS := vcma9.o flash.o cmd_vcma9.o
|
||||||
COBJS += ../common/common_util.o ../common/memtst.o
|
COBJS += ../common/common_util.o
|
||||||
|
|
||||||
SOBJS := lowlevel_init.o
|
SOBJS := lowlevel_init.o
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue