starfive: Add v4l2 video sensor device and DRM framework in dts

Signed-off-by: sw.multimedia <sw.multimedia@starfivetech.com>
Signed-off-by: andy.hu <andy.hu@starfivetech.com>
Signed-off-by: david.li <david.li@starfivetech.com>
Signed-off-by: keithzhao <keith.zhao@starfivetech.com>
Signed-off-by: Curry Zhang <curry.zhang@starfivetech.com>
This commit is contained in:
sw.multimedia 2021-09-03 21:52:47 +08:00 committed by Tekkaman Ninja
parent df3814cfb1
commit aa2ef16eb2
3 changed files with 380 additions and 21 deletions

View file

@ -97,7 +97,23 @@
imx219@10 {
compatible = "imx219";
reg = <0x10>;
clocks = <&clk_ext_camera>;
clock-names = "xclk";
// powerdown-gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
reset-gpio = <&gpio 58 GPIO_ACTIVE_HIGH>;
//DOVDD-supply = <&v2v8>;
rotation = <0>;
port {
/* CSI2 bus endpoint */
imx219_to_csi2rx0: endpoint {
remote-endpoint = <&csi2rx0_from_imx219>;
bus-type = <4>; /* MIPI CSI-2 D-PHY */
clock-lanes = <0>;
data-lanes = <1 2>;
link-frequencies = /bits/ 64 <456000000>;
};
};
};
pmic@5e {
@ -113,6 +129,12 @@
tda998x@70 {
compatible = "nxp,tda998x";
reg = <0x70>;
port {
tda998x_0_input: endpoint {
remote-endpoint = <&hdmi_out>;
};
};
};
};
@ -142,6 +164,50 @@
reg = <0x45>;
};
/* TODO: ov5640 and sc2235 used on EVB board, not support on starlight board, remove it here?*/
ov5640: ov5640@3c {
compatible = "ovti,ov5640";
reg = <0x3c>;
clocks = <&clk_ext_camera>;
clock-names = "xclk";
powerdown-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
//DOVDD-supply = <&v2v8>;
rotation = <180>;
port {
// Parallel bus endpoint
ov5640_to_parallel: endpoint {
remote-endpoint = <&parallel_from_ov5640>;
bus-type = <5>; // Parallel
bus-width = <8>;
data-shift = <2>; // lines 9:2 are used
hsync-active = <0>;
vsync-active = <1>;
pclk-sample = <1>;
};
};
};
sc2235@30 {
compatible = "sc2235";
reg = <0x30>;
clocks = <&clk_ext_camera>;
clock-names = "xclk";
powerdown-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
//DOVDD-supply = <&v2v8>;
port {
// Parallel bus endpoint
sc2235_to_parallel: endpoint {
remote-endpoint = <&parallel_from_sc2235>;
bus-type = <5>; // Parallel
bus-width = <8>;
data-shift = <2>; // lines 13:6 are used
hsync-active = <1>;
vsync-active = <1>;
pclk-sample = <1>;
};
};
};
};
&i2c2 {
@ -163,6 +229,28 @@
};
};
};
imx219sub@10 {
compatible = "imx219";
reg = <0x10>;
clocks = <&clk_ext_camera>;
clock-names = "xclk";
// powerdown-gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
reset-gpio = <&gpio 57 GPIO_ACTIVE_HIGH>;
//DOVDD-supply = <&v2v8>;
rotation = <0>;
port {
/* CSI2 bus endpoint */
imx219_to_csi2rx1: endpoint {
remote-endpoint = <&csi2rx1_from_imx219>;
bus-type = <4>; /* MIPI CSI-2 D-PHY */
clock-lanes = <0>;
data-lanes = <1 2>;
link-frequencies = /bits/ 64 <456000000>;
};
};
};
};
&osc_sys {
@ -234,18 +322,16 @@
&sfivefb {
status = "okay";
/*
pp1 {
pp-id = <1>;
fifo-out;
src-format = <COLOR_YUV420_NV21>;
src-width = <800>;
src-height = <480>;
src-width = <1920>;
src-height = <1080>;
dst-format = <COLOR_RGB888_ARGB>;
dst-width = <800>;
dst-height = <480>;
dst-width = <1920>;
dst-height = <1080>;
};
*/
tda_998x_1080p {
compatible = "starfive,display-dev";

View file

@ -554,6 +554,107 @@
status = "disabled";
};
display-subsystem {
compatible = "starfive,display-subsystem";
memory-region = <&sffb_reserved>;
status = "okay";
dma-coherent;
};
display-encoder {
compatible = "starfive,display-encoder";
encoder-type = <2>; //2-TMDS, 3-LVDS, 6-DSI, 8-DPI
status = "okay";
ports {
port@0 {
hdmi_out:endpoint {
remote-endpoint = <&tda998x_0_input>;
//remote-endpoint = <&dsi_out_port>;
};
};
port@1 {
hdmi_input0:endpoint {
remote-endpoint = <&crtc_0_out>;
};
};
};
};
crtc: crtc@12000000 {
compatible = "starfive,jh7100-crtc";
status = "okay";
interrupt-parent = <&plic>;
interrupts = <101>, <103>;
interrupt-names = "lcdc_irq", "vpp1_irq";
reg = <0x0 0x12000000 0x0 0x10000>,
//<0x0 0x12100000 0x0 0x10000>,
<0x0 0x12040000 0x0 0x10000>,
<0x0 0x12080000 0x0 0x10000>,
<0x0 0x120c0000 0x0 0x10000>,
<0x0 0x12240000 0x0 0x10000>,
<0x0 0x12250000 0x0 0x10000>,
<0x0 0x12260000 0x0 0x10000>;
//reg-names = "lcdc", "dsitx", "vpp0", "vpp1", "vpp2", "clk", "rst", "sys";
reg-names = "lcdc", "vpp0", "vpp1", "vpp2", "clk", "rst", "sys";
clocks = <&uartclk>, <&apb2clk>;
clock-names = "baudclk", "apb_pclk";
ddr-format = <WIN_FMT_RGB565>;
#address-cells = <1>;
#size-cells = <0>;
pp1 {
pp-id = <1>;
fifo-out;
//sys-bus-out;
src-format = <COLOR_RGB565>;
src-width = <1920>;
src-height = <1080>;
dst-format = <COLOR_RGB888_ARGB>;
dst-width = <1920>;
dst-height = <1080>;
};
port: port@0 {
reg = <0>;
crtc_0_out: endpoint {
remote-endpoint = <&hdmi_input0>;
};
};
};
mipi_dphy: mipi-dphy@12260000{
compatible = "starfive,jh7100-mipi-dphy-tx";
//reg = <0x0 0x12260000 0x0 0x10000>;
clocks = <&uartclk>, <&apb2clk>;
clock-names = "baudclk", "apb_pclk";
#phy-cells = <0>;
};
mipi_dsi: mipi@12100000 {
compatible = "cdns,dsi";
clocks = <&apb1clk>, <&apb2clk>;
clock-names = "dsi_p_clk", "dsi_sys_clk";
phys = <&mipi_dphy>;
phy-names = "dphy";
status = "okay";
reg = <0x0 0x12100000 0x0 0x10000>;
reg-names = "dsi";
port {
dsi_out_port: endpoint {
remote-endpoint = <&panel_dsi_port>;
};
};
mipi_panel: panel@0 {
//compatible = "";
status = "okay";
};
};
vin_sysctl: vin_sysctl@19800000 {
compatible = "starfive,stf-vin";
reg = <0x0 0x19800000 0x0 0x10000>,
@ -568,22 +669,179 @@
<0x0 0x11858000 0x0 0x10000>;
reg-names = "mipi0", "vclk", "vrst", "mipi1", "sctrl",
"isp0", "isp1", "tclk", "trst", "iopad";
interrupts = <119 109>;
interrupts = <119 109 112>;
memory-region = <&vin_reserved>;
/*defaule config for imx219 vin&isp*/
format = <SRC_CSI2RX_VIN_ISP>;
frame-width = <800>;
frame-height =<480>;
isp0_enable;
csi-lane = <2>;
csi-dlane-swaps = /bits/ 8 <1>,/bits/ 8 <2>,/bits/ 8 <3>,/bits/ 8 <4>;
csi-dlane-pn-swaps = /bits/ 8 <0>,/bits/ 8 <0>,/bits/ 8 <0>,/bits/ 8 <0>;
csi-clane-swap = /bits/ 8 <0>;
csi-clane-pn-swap = /bits/ 8 <0>;
csi-mipiID = <0>;
csi-width = <1920>;
csi-height = <1080>;
csi-dt = <0x2b>;
status = "okay";
clocks = <&clkgen JH7100_CLK_VIN_SRC>,
<&clkgen JH7100_CLK_ISP0_AXI>,
<&clkgen JH7100_CLK_ISP0NOC_AXI>,
<&clkgen JH7100_CLK_ISPSLV_AXI>,
<&clkgen JH7100_CLK_ISP1_AXI>,
<&clkgen JH7100_CLK_ISP1NOC_AXI>,
<&clkgen JH7100_CLK_VIN_AXI>,
<&clkgen JH7100_CLK_VINNOC_AXI>;
// <&clkgen JH7100_CLK_CSI2RX_APB>,
// <&clkgen JH7100_CLK_MIPI_RX0_PXL_0>,
// <&clkgen JH7100_CLK_MIPI_RX0_PXL_1>,
// <&clkgen JH7100_CLK_MIPI_RX0_PXL_2>,
// <&clkgen JH7100_CLK_MIPI_RX0_PXL_3>,
// <&clkgen JH7100_CLK_MIPI_RX0_SYS>,
// <&clkgen JH7100_CLK_MIPI_RX1_PXL_0>,
// <&clkgen JH7100_CLK_MIPI_RX1_PXL_1>,
// <&clkgen JH7100_CLK_MIPI_RX1_PXL_2>,
// <&clkgen JH7100_CLK_MIPI_RX1_PXL_3>,
// <&clkgen JH7100_CLK_MIPI_RX1_SYS>,
// <&clkgen JH7100_CLK_DPHY_CFGCLK>,
// <&clkgen JH7100_CLK_DPHY_REFCLK>,
// <&clkgen JH7100_CLK_DPHY_TXCLKESC>,
// <&clkgen JH7100_CLK_ISP0_CTRL>,
// <&clkgen JH7100_CLK_ISP0_2X_CTRL>,
// <&clkgen JH7100_CLK_ISP0_MIPI_CTRL>,
// <&clkgen JH7100_CLK_ISP1_CTRL>,
// <&clkgen JH7100_CLK_ISP1_2X_CTRL>,
// <&clkgen JH7100_CLK_ISP1_MIPI_CTRL>;
clock-names = "vin_src",
"isp0_axi",
"isp0noc_axi",
"ispslv_axi",
"isp1_axi",
"isp1noc_axi",
"vin_axi",
"vinnoc_axi";
// "csi2rx_apb_clk",
// "mipirx0_pixel0",
// "mipirx0_pixel1",
// "mipirx0_pixel2",
// "mipirx0_pixel3",
// "mipirx0_sys",
// "mipirx1_pixel0",
// "mipirx1_pixel1",
// "mipirx1_pixel2",
// "mipirx1_pixel3",
// "mipirx1_sys",
// "csidphy_cfgclk",
// "csidphy_regclk",
// "csidphy_txclkesc",
// "isp0_ctrl",
// "isp0_2x_ctrl",
// "isp0_mipi_ctrl",
// "isp1_ctrl",
// "isp1_2x_ctrl",
// "isp1_mipi_ctrl";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dphy0_out_csi2rx: endpoint {
remote-endpoint = <&csi2rx0_in_dphy>;
clock-lanes = <0>;
data-lanes = <1 2>;
status = "failed";
};
};
//port@1 {
// reg = <1>;
// dphy1_out_csi2rx: endpoint {
// remote-endpoint = <&csi2rx1_in_dphy>;
// clock-lanes = <0>;
// data-lanes = <1 2>;
// status = "failed";
// };
//};
/* TODO: Used for EVB board, comment here for starlight board, remove it later*/
port@2 {
reg = <2>; // dvp sensor
// Parallel bus endpoint
parallel_from_ov5640: endpoint {
remote-endpoint = <&ov5640_to_parallel>;
bus-type = <5>; // Parallel
bus-width = <8>;
data-shift = <2>; // lines 9:2 are used
hsync-active = <1>;
vsync-active = <0>;
pclk-sample = <1>;
status = "failed";
};
};
port@3 {
reg = <2>; //dvp sensor
// Parallel bus endpoint
parallel_from_sc2235: endpoint {
remote-endpoint = <&sc2235_to_parallel>;
bus-type = <5>; // Parallel
bus-width = <8>;
data-shift = <2>; // lines 9:2 are used
hsync-active = <1>;
vsync-active = <1>;
pclk-sample = <1>;
status = "failed";
};
};
port@4 {
reg = <3>; //csi2rx0 sensor
/* CSI2 bus endpoint */
csi2rx0_from_imx219: endpoint {
remote-endpoint = <&imx219_to_csi2rx0>;
bus-type = <4>; /* MIPI CSI-2 D-PHY */
clock-lanes = <0>;
data-lanes = <1 2>;
status = "okay";
};
};
port@5 {
reg = <4>; // csi2rx1 sensor
/* CSI2 bus endpoint */
csi2rx1_from_imx219: endpoint {
remote-endpoint = <&imx219_to_csi2rx1>;
bus-type = <4>; /* MIPI CSI-2 D-PHY */
clock-lanes = <5>;
data-lanes = <3 4>;
lane-polarities = <0 1 0>;
status = "okay";
};
};
};
};
csi2rx: csi-bridge@19800000 {
compatible = "cdns,csi2rx";
reg = <0x0 0x19800000 0x0 0x10000>;
clocks = <&byteclock>, <&byteclock>,
<&coreclock>, <&coreclock>,
<&coreclock>, <&coreclock>;
clock-names = "sys_clk", "p_clk",
"pixel_if0_clk", "pixel_if1_clk",
"pixel_if2_clk", "pixel_if3_clk";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
csi2rx0_in_dphy: endpoint {
remote-endpoint = <&dphy0_out_csi2rx>;
clock-lanes = <0>;
data-lanes = <1 2>;
};
};
};
};
sfctemp: tmon@124a0000 {

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@ -114,4 +114,19 @@
compatible = "fixed-clock";
clock-frequency = <12288000>;
};
clk_ext_camera: clk-ext-camera {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
};
byteclock: byteclock {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
};
coreclock: coreclock {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
};
};