mirror of
https://github.com/Fishwaldo/u-boot.git
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starfive: Add v4l2 video sensor device and DRM framework in dts
Signed-off-by: sw.multimedia <sw.multimedia@starfivetech.com> Signed-off-by: andy.hu <andy.hu@starfivetech.com> Signed-off-by: david.li <david.li@starfivetech.com> Signed-off-by: keithzhao <keith.zhao@starfivetech.com> Signed-off-by: Curry Zhang <curry.zhang@starfivetech.com>
This commit is contained in:
parent
df3814cfb1
commit
aa2ef16eb2
3 changed files with 380 additions and 21 deletions
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@ -97,7 +97,23 @@
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imx219@10 {
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compatible = "imx219";
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reg = <0x10>;
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clocks = <&clk_ext_camera>;
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clock-names = "xclk";
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// powerdown-gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
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reset-gpio = <&gpio 58 GPIO_ACTIVE_HIGH>;
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//DOVDD-supply = <&v2v8>;
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rotation = <0>;
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port {
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/* CSI2 bus endpoint */
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imx219_to_csi2rx0: endpoint {
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remote-endpoint = <&csi2rx0_from_imx219>;
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bus-type = <4>; /* MIPI CSI-2 D-PHY */
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clock-lanes = <0>;
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data-lanes = <1 2>;
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link-frequencies = /bits/ 64 <456000000>;
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};
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};
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};
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pmic@5e {
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@ -113,6 +129,12 @@
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tda998x@70 {
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compatible = "nxp,tda998x";
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reg = <0x70>;
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port {
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tda998x_0_input: endpoint {
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remote-endpoint = <&hdmi_out>;
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};
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};
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};
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};
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@ -142,6 +164,50 @@
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reg = <0x45>;
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};
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/* TODO: ov5640 and sc2235 used on EVB board, not support on starlight board, remove it here?*/
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ov5640: ov5640@3c {
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compatible = "ovti,ov5640";
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reg = <0x3c>;
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clocks = <&clk_ext_camera>;
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clock-names = "xclk";
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powerdown-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
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//DOVDD-supply = <&v2v8>;
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rotation = <180>;
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port {
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// Parallel bus endpoint
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ov5640_to_parallel: endpoint {
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remote-endpoint = <¶llel_from_ov5640>;
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bus-type = <5>; // Parallel
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bus-width = <8>;
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data-shift = <2>; // lines 9:2 are used
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hsync-active = <0>;
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vsync-active = <1>;
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pclk-sample = <1>;
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};
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};
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};
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sc2235@30 {
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compatible = "sc2235";
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reg = <0x30>;
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clocks = <&clk_ext_camera>;
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clock-names = "xclk";
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powerdown-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
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//DOVDD-supply = <&v2v8>;
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port {
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// Parallel bus endpoint
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sc2235_to_parallel: endpoint {
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remote-endpoint = <¶llel_from_sc2235>;
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bus-type = <5>; // Parallel
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bus-width = <8>;
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data-shift = <2>; // lines 13:6 are used
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hsync-active = <1>;
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vsync-active = <1>;
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pclk-sample = <1>;
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};
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};
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};
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};
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&i2c2 {
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@ -163,6 +229,28 @@
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};
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};
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};
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imx219sub@10 {
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compatible = "imx219";
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reg = <0x10>;
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clocks = <&clk_ext_camera>;
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clock-names = "xclk";
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// powerdown-gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
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reset-gpio = <&gpio 57 GPIO_ACTIVE_HIGH>;
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//DOVDD-supply = <&v2v8>;
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rotation = <0>;
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port {
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/* CSI2 bus endpoint */
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imx219_to_csi2rx1: endpoint {
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remote-endpoint = <&csi2rx1_from_imx219>;
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bus-type = <4>; /* MIPI CSI-2 D-PHY */
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clock-lanes = <0>;
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data-lanes = <1 2>;
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link-frequencies = /bits/ 64 <456000000>;
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};
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};
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};
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};
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&osc_sys {
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@ -234,18 +322,16 @@
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&sfivefb {
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status = "okay";
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/*
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pp1 {
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pp-id = <1>;
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fifo-out;
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src-format = <COLOR_YUV420_NV21>;
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src-width = <800>;
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src-height = <480>;
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src-width = <1920>;
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src-height = <1080>;
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dst-format = <COLOR_RGB888_ARGB>;
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dst-width = <800>;
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dst-height = <480>;
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dst-width = <1920>;
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dst-height = <1080>;
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};
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*/
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tda_998x_1080p {
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compatible = "starfive,display-dev";
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@ -554,6 +554,107 @@
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status = "disabled";
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};
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display-subsystem {
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compatible = "starfive,display-subsystem";
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memory-region = <&sffb_reserved>;
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status = "okay";
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dma-coherent;
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};
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display-encoder {
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compatible = "starfive,display-encoder";
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encoder-type = <2>; //2-TMDS, 3-LVDS, 6-DSI, 8-DPI
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status = "okay";
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ports {
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port@0 {
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hdmi_out:endpoint {
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remote-endpoint = <&tda998x_0_input>;
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//remote-endpoint = <&dsi_out_port>;
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};
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};
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port@1 {
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hdmi_input0:endpoint {
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remote-endpoint = <&crtc_0_out>;
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};
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};
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};
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};
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crtc: crtc@12000000 {
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compatible = "starfive,jh7100-crtc";
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status = "okay";
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interrupt-parent = <&plic>;
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interrupts = <101>, <103>;
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interrupt-names = "lcdc_irq", "vpp1_irq";
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reg = <0x0 0x12000000 0x0 0x10000>,
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//<0x0 0x12100000 0x0 0x10000>,
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<0x0 0x12040000 0x0 0x10000>,
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<0x0 0x12080000 0x0 0x10000>,
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<0x0 0x120c0000 0x0 0x10000>,
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<0x0 0x12240000 0x0 0x10000>,
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<0x0 0x12250000 0x0 0x10000>,
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<0x0 0x12260000 0x0 0x10000>;
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//reg-names = "lcdc", "dsitx", "vpp0", "vpp1", "vpp2", "clk", "rst", "sys";
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reg-names = "lcdc", "vpp0", "vpp1", "vpp2", "clk", "rst", "sys";
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clocks = <&uartclk>, <&apb2clk>;
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clock-names = "baudclk", "apb_pclk";
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ddr-format = <WIN_FMT_RGB565>;
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#address-cells = <1>;
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#size-cells = <0>;
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pp1 {
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pp-id = <1>;
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fifo-out;
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//sys-bus-out;
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src-format = <COLOR_RGB565>;
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src-width = <1920>;
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src-height = <1080>;
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dst-format = <COLOR_RGB888_ARGB>;
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dst-width = <1920>;
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dst-height = <1080>;
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};
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port: port@0 {
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reg = <0>;
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crtc_0_out: endpoint {
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remote-endpoint = <&hdmi_input0>;
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};
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};
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};
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mipi_dphy: mipi-dphy@12260000{
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compatible = "starfive,jh7100-mipi-dphy-tx";
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//reg = <0x0 0x12260000 0x0 0x10000>;
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clocks = <&uartclk>, <&apb2clk>;
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clock-names = "baudclk", "apb_pclk";
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#phy-cells = <0>;
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};
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mipi_dsi: mipi@12100000 {
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compatible = "cdns,dsi";
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clocks = <&apb1clk>, <&apb2clk>;
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clock-names = "dsi_p_clk", "dsi_sys_clk";
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phys = <&mipi_dphy>;
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phy-names = "dphy";
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status = "okay";
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reg = <0x0 0x12100000 0x0 0x10000>;
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reg-names = "dsi";
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port {
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dsi_out_port: endpoint {
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remote-endpoint = <&panel_dsi_port>;
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};
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};
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mipi_panel: panel@0 {
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//compatible = "";
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status = "okay";
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};
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};
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vin_sysctl: vin_sysctl@19800000 {
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compatible = "starfive,stf-vin";
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reg = <0x0 0x19800000 0x0 0x10000>,
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@ -568,22 +669,179 @@
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<0x0 0x11858000 0x0 0x10000>;
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reg-names = "mipi0", "vclk", "vrst", "mipi1", "sctrl",
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"isp0", "isp1", "tclk", "trst", "iopad";
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interrupts = <119 109>;
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interrupts = <119 109 112>;
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memory-region = <&vin_reserved>;
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/*defaule config for imx219 vin&isp*/
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format = <SRC_CSI2RX_VIN_ISP>;
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frame-width = <800>;
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frame-height =<480>;
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isp0_enable;
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csi-lane = <2>;
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csi-dlane-swaps = /bits/ 8 <1>,/bits/ 8 <2>,/bits/ 8 <3>,/bits/ 8 <4>;
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csi-dlane-pn-swaps = /bits/ 8 <0>,/bits/ 8 <0>,/bits/ 8 <0>,/bits/ 8 <0>;
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csi-clane-swap = /bits/ 8 <0>;
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csi-clane-pn-swap = /bits/ 8 <0>;
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csi-mipiID = <0>;
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csi-width = <1920>;
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csi-height = <1080>;
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csi-dt = <0x2b>;
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status = "okay";
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clocks = <&clkgen JH7100_CLK_VIN_SRC>,
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<&clkgen JH7100_CLK_ISP0_AXI>,
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<&clkgen JH7100_CLK_ISP0NOC_AXI>,
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<&clkgen JH7100_CLK_ISPSLV_AXI>,
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<&clkgen JH7100_CLK_ISP1_AXI>,
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<&clkgen JH7100_CLK_ISP1NOC_AXI>,
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<&clkgen JH7100_CLK_VIN_AXI>,
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<&clkgen JH7100_CLK_VINNOC_AXI>;
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// <&clkgen JH7100_CLK_CSI2RX_APB>,
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// <&clkgen JH7100_CLK_MIPI_RX0_PXL_0>,
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// <&clkgen JH7100_CLK_MIPI_RX0_PXL_1>,
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// <&clkgen JH7100_CLK_MIPI_RX0_PXL_2>,
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// <&clkgen JH7100_CLK_MIPI_RX0_PXL_3>,
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// <&clkgen JH7100_CLK_MIPI_RX0_SYS>,
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// <&clkgen JH7100_CLK_MIPI_RX1_PXL_0>,
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// <&clkgen JH7100_CLK_MIPI_RX1_PXL_1>,
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// <&clkgen JH7100_CLK_MIPI_RX1_PXL_2>,
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// <&clkgen JH7100_CLK_MIPI_RX1_PXL_3>,
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// <&clkgen JH7100_CLK_MIPI_RX1_SYS>,
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// <&clkgen JH7100_CLK_DPHY_CFGCLK>,
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// <&clkgen JH7100_CLK_DPHY_REFCLK>,
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// <&clkgen JH7100_CLK_DPHY_TXCLKESC>,
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// <&clkgen JH7100_CLK_ISP0_CTRL>,
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// <&clkgen JH7100_CLK_ISP0_2X_CTRL>,
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// <&clkgen JH7100_CLK_ISP0_MIPI_CTRL>,
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// <&clkgen JH7100_CLK_ISP1_CTRL>,
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// <&clkgen JH7100_CLK_ISP1_2X_CTRL>,
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// <&clkgen JH7100_CLK_ISP1_MIPI_CTRL>;
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clock-names = "vin_src",
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"isp0_axi",
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"isp0noc_axi",
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"ispslv_axi",
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"isp1_axi",
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"isp1noc_axi",
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"vin_axi",
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"vinnoc_axi";
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// "csi2rx_apb_clk",
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// "mipirx0_pixel0",
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// "mipirx0_pixel1",
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// "mipirx0_pixel2",
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// "mipirx0_pixel3",
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// "mipirx0_sys",
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// "mipirx1_pixel0",
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// "mipirx1_pixel1",
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// "mipirx1_pixel2",
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// "mipirx1_pixel3",
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// "mipirx1_sys",
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// "csidphy_cfgclk",
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// "csidphy_regclk",
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// "csidphy_txclkesc",
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// "isp0_ctrl",
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// "isp0_2x_ctrl",
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// "isp0_mipi_ctrl",
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// "isp1_ctrl",
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// "isp1_2x_ctrl",
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// "isp1_mipi_ctrl";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dphy0_out_csi2rx: endpoint {
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remote-endpoint = <&csi2rx0_in_dphy>;
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clock-lanes = <0>;
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data-lanes = <1 2>;
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status = "failed";
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};
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};
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//port@1 {
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// reg = <1>;
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// dphy1_out_csi2rx: endpoint {
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// remote-endpoint = <&csi2rx1_in_dphy>;
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// clock-lanes = <0>;
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// data-lanes = <1 2>;
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// status = "failed";
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// };
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//};
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/* TODO: Used for EVB board, comment here for starlight board, remove it later*/
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port@2 {
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reg = <2>; // dvp sensor
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// Parallel bus endpoint
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parallel_from_ov5640: endpoint {
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remote-endpoint = <&ov5640_to_parallel>;
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bus-type = <5>; // Parallel
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bus-width = <8>;
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data-shift = <2>; // lines 9:2 are used
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hsync-active = <1>;
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vsync-active = <0>;
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pclk-sample = <1>;
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status = "failed";
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};
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};
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port@3 {
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reg = <2>; //dvp sensor
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// Parallel bus endpoint
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parallel_from_sc2235: endpoint {
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remote-endpoint = <&sc2235_to_parallel>;
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bus-type = <5>; // Parallel
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bus-width = <8>;
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data-shift = <2>; // lines 9:2 are used
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hsync-active = <1>;
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vsync-active = <1>;
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pclk-sample = <1>;
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status = "failed";
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};
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};
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port@4 {
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reg = <3>; //csi2rx0 sensor
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/* CSI2 bus endpoint */
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csi2rx0_from_imx219: endpoint {
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remote-endpoint = <&imx219_to_csi2rx0>;
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bus-type = <4>; /* MIPI CSI-2 D-PHY */
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clock-lanes = <0>;
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data-lanes = <1 2>;
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status = "okay";
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};
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};
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port@5 {
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reg = <4>; // csi2rx1 sensor
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/* CSI2 bus endpoint */
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csi2rx1_from_imx219: endpoint {
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remote-endpoint = <&imx219_to_csi2rx1>;
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bus-type = <4>; /* MIPI CSI-2 D-PHY */
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clock-lanes = <5>;
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data-lanes = <3 4>;
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lane-polarities = <0 1 0>;
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status = "okay";
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};
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};
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};
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};
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csi2rx: csi-bridge@19800000 {
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compatible = "cdns,csi2rx";
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reg = <0x0 0x19800000 0x0 0x10000>;
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clocks = <&byteclock>, <&byteclock>,
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<&coreclock>, <&coreclock>,
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<&coreclock>, <&coreclock>;
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clock-names = "sys_clk", "p_clk",
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"pixel_if0_clk", "pixel_if1_clk",
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"pixel_if2_clk", "pixel_if3_clk";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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csi2rx0_in_dphy: endpoint {
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remote-endpoint = <&dphy0_out_csi2rx>;
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clock-lanes = <0>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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sfctemp: tmon@124a0000 {
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@ -114,4 +114,19 @@
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compatible = "fixed-clock";
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clock-frequency = <12288000>;
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};
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clk_ext_camera: clk-ext-camera {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
|
||||
};
|
||||
byteclock: byteclock {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
coreclock: coreclock {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
};
|
||||
|
|
Loading…
Add table
Reference in a new issue