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arm: socfpga: config: Enable CONFIG_SPI_FLASH_BAR

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This is needed to access broken (read: Micron) SPI flashes which
are larger than 16 MiB and don't correctly support 4-byte addressing.

Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut 2015-07-20 05:48:37 +02:00
parent cbc9544d27
commit ab48b19a66
1 changed files with 1 additions and 0 deletions
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include/configs/socfpga_common.h
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@ -207,6 +207,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#endif
#define CONFIG_CQSPI_DECODER 0
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH_BAR
#endif
#ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */