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Blackfin: bf518f-ezbrd: setup portmux for async flash
The pins for async memory where parallel flash lives are not enabled by default, so make sure we mux them as needed. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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2 changed files with 17 additions and 0 deletions
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@ -146,3 +146,19 @@ int misc_init_r(void)
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return 0;
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return 0;
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}
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}
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int board_early_init_f(void)
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{
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#if !defined(CONFIG_SYS_NO_FLASH)
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/* setup BF518-EZBRD GPIO pin PG11 to AMS2. */
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bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2);
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bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG11);
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# if !defined(CONFIG_BFIN_SPI)
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/* setup BF518-EZBRD GPIO pin PG15 to AMS3. */
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bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_3);
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bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG15);
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# endif
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#endif
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return 0;
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}
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@ -132,6 +132,7 @@
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/*
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/*
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* Misc Settings
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* Misc Settings
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*/
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*/
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MISC_INIT_R
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#define CONFIG_MISC_INIT_R
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#define CONFIG_RTC_BFIN
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#define CONFIG_RTC_BFIN
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#define CONFIG_UART_CONSOLE 0
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#define CONFIG_UART_CONSOLE 0
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