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ARM: ti816x: Fix enabling GPIO0, enable GPIO1 as well

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The TI816x has 2 GPIO banks.  For bank 0 we had been clearing the enable
bit when setting BIT(8).  Correct this by setting it to BIT(1) | BIT(8)
after we set and wait for BIT(1) (aka PRCM_MOD_EN).  Enable GPIO1 as
well so that when CMD_GPIO is enabled it won't crash probing the second
bank.  Enable CMD_GPIO on ti816x_evm.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2017-07-07 15:21:45 -04:00
parent 39b4f6bce3
commit ab86dc7948
2 changed files with 8 additions and 1 deletions
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8
arch/arm/mach-omap2/am33xx/clock_ti816x.c
View file

@ -335,7 +335,13 @@ static void peripheral_enable(void)
writel(PRCM_MOD_EN, &cmalwon->gpio0clkctrl); writel(PRCM_MOD_EN, &cmalwon->gpio0clkctrl);
while (readl(&cmalwon->gpio0clkctrl) != PRCM_MOD_EN) while (readl(&cmalwon->gpio0clkctrl) != PRCM_MOD_EN)
; ;
writel((BIT(8)), &cmalwon->gpio0clkctrl); writel((BIT(1) | BIT(8)), &cmalwon->gpio0clkctrl);
/* Enable gpio1 */
writel(PRCM_MOD_EN, &cmalwon->gpio1clkctrl);
while (readl(&cmalwon->gpio1clkctrl) != PRCM_MOD_EN)
;
writel((BIT(1) | BIT(8)), &cmalwon->gpio1clkctrl);
/* Enable spi */ /* Enable spi */
writel(PRCM_MOD_EN, &cmalwon->spiclkctrl); writel(PRCM_MOD_EN, &cmalwon->spiclkctrl);

1
configs/ti816x_evm_defconfig
View file

@ -27,6 +27,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
CONFIG_CMD_MMC=y CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set # CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_EXT4_WRITE=y
# CONFIG_ISO_PARTITION is not set # CONFIG_ISO_PARTITION is not set