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x86: tsc: add support for reading CPU freq from cpuid
Starting with cpuid level 0x16 (Skylake-based processors) it is possible to get CPU base freq via cpuid. This fixes booting on a skylake based system. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed wrong indention of labels] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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1 changed files with 25 additions and 6 deletions
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@ -21,6 +21,17 @@
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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static unsigned long cpu_mhz_from_cpuid(void)
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{
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if (gd->arch.x86_vendor != X86_VENDOR_INTEL)
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return 0;
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if (cpuid_eax(0) < 0x16)
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return 0;
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return cpuid_eax(0x16);
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}
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/*
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/*
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* According to Intel 64 and IA-32 System Programming Guide,
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* According to Intel 64 and IA-32 System Programming Guide,
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* if MSR_PERF_STAT[31] is set, the maximum resolved bus ratio can be
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* if MSR_PERF_STAT[31] is set, the maximum resolved bus ratio can be
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@ -343,13 +354,21 @@ static void tsc_timer_ensure_setup(void)
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if (!gd->arch.clock_rate) {
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if (!gd->arch.clock_rate) {
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unsigned long fast_calibrate;
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unsigned long fast_calibrate;
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fast_calibrate = cpu_mhz_from_msr();
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fast_calibrate = cpu_mhz_from_cpuid();
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if (!fast_calibrate) {
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if (fast_calibrate)
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fast_calibrate = quick_pit_calibrate();
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goto done;
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if (!fast_calibrate)
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panic("TSC frequency is ZERO");
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}
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fast_calibrate = cpu_mhz_from_msr();
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if (fast_calibrate)
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goto done;
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fast_calibrate = quick_pit_calibrate();
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if (fast_calibrate)
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goto done;
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panic("TSC frequency is ZERO");
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done:
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gd->arch.clock_rate = fast_calibrate * 1000000;
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gd->arch.clock_rate = fast_calibrate * 1000000;
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}
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}
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}
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}
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