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ppc4xx: Fix crash on sequoia with cache enabled
Currently U-Boot crashes on sequoia board in CPU POST if cache is enabled (CONFIG_4xx_DCACHE defined). The cache won't be disabled by change_tlb before CPU POST because there is an insufficient adress range check since CFG_MEM_TOP_HIDE was introduced. This patch tries to fix this problem. Signed-off-by: Anatolij Gustschin <agust@denx.de>
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1 changed files with 3 additions and 1 deletions
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@ -149,7 +149,9 @@ void change_tlb(u32 vaddr, u32 size, u32 tlb_word2_i_value)
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/*
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/*
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* Now check the end-address if it's in the range
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* Now check the end-address if it's in the range
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*/
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*/
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if ((tlb_vaddr + tlb_size - 1) <= (vaddr + size - 1)) {
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if (((tlb_vaddr + tlb_size - 1) <= (vaddr + size - 1)) ||
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((tlb_vaddr < (vaddr + size - 1)) &&
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((tlb_vaddr + tlb_size - 1) > (vaddr + size - 1)))) {
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/*
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/*
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* Found a TLB in the range.
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* Found a TLB in the range.
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* Change cache attribute in tlb2 word.
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* Change cache attribute in tlb2 word.
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