Add "pcidelay" environment variable (in ms, enabled via CONFIG_PCI_BOOTDELAY).

CHANGELOG

@@ -2,6 +2,12 @@
 Changes since U-Boot 0.2.1:
 ======================================================================
 
+* Patch by Stefan Roese, 13 Feb 2003:
+  Add "pcidelay" environment variable (in ms, enabled via
+  CONFIG_PCI_BOOTDELAY).
+  PCI spec 2.2 defines, that a pci target has 2^25 pci clocks after
+  RST# to respond to configuration cycles (33MHz -> 1s).
+
 * Patch by Stefan Roese, 10 Feb 2003:
   Add support for 4MB and 128MB onboard SDRAM (cpu/ppc4xx/sdram.c)
 

board/MAI/AmigaOneG3SE/AmigaOneG3SE.c

@@ -107,7 +107,7 @@ int misc_init_r (void)
 }
 
 
-void pci_init (void)
+void pci_init_board (void)
 {
 #ifndef CONFIG_RAMBOOT
 	articiaS_pci_init ();

board/bmw/bmw.c

@@ -102,7 +102,7 @@ int misc_init_f (void)
  */
 struct pci_controller hose;
 
-void pci_init (void)
+void pci_init_board (void)
 {
     pci_mpc824x_init(&hose);
     /* pci_dev_init(0); */

board/cu824/cu824.c

@@ -113,7 +113,7 @@ struct pci_controller hose = {
 #endif
 };
 
-void pci_init(void)
+void pci_init_board(void)
 {
 	pci_mpc824x_init(&hose);
 }

board/eltec/bab7xx/pci.c

@@ -33,7 +33,7 @@
 
 struct pci_controller local_hose;
 
-void pci_init(void)
+void pci_init_board(void)
 {
     struct pci_controller* hose = (struct pci_controller *)&local_hose;
     u32 reg32;

board/eltec/elppc/pci.c

@@ -33,7 +33,7 @@
 
 struct pci_controller local_hose;
 
-void pci_init(void)
+void pci_init_board(void)
 {
     struct pci_controller* hose = (struct pci_controller *)&local_hose;
     u16 reg16;

board/esd/common/pci.c

@@ -166,7 +166,7 @@ static struct pci_controller pci9054_hose = {
   config_table: pci9054_config_table,
 };
 
-void pci_init(void)
+void pci_init_board(void)
 {
   struct pci_controller *hose = &pci9054_hose;
 

board/evb64260/pci.c

@@ -597,7 +597,7 @@ struct pci_controller pci1_hose = {
 };
 
 void
-pci_init(void)
+pci_init_board(void)
 {
     unsigned int command;
 

board/mousse/pci.c

@@ -277,7 +277,7 @@ struct pci_controller hose = {
 	fixup_irq: pci_mousse_fixup_irq,
 };
 
-void pci_init(void)
+void pci_init_board(void)
 {
 	pci_mpc824x_init(&hose);
 }

board/mpl/common/pci.c

@@ -90,7 +90,7 @@ static struct pci_controller hose = {
   fixup_irq: pci_pip405_fixup_irq,
 };
 
-void pci_init(void)
+void pci_init_board(void)
 {
 	/*we want the ptrs to RAM not flash (ie don't use init list)*/
 	hose.fixup_irq    = pci_pip405_fixup_irq;

board/musenki/musenki.c

@@ -124,7 +124,7 @@ struct pci_controller hose = {
 #endif
 };
 
-void pci_init(void)
+void pci_init_board(void)
 {
 	pci_mpc824x_init(&hose);
 }

board/oxc/oxc.c

@@ -108,7 +108,7 @@ static struct pci_controller hose = {
 #endif
 };
 
-void pci_init (void)
+void pci_init_board (void)
 {
 	pci_mpc824x_init(&hose);
 }

board/pcippc2/pcippc2.c

@@ -135,7 +135,7 @@ int misc_init_r (void)
 	return (0);
 }
 
-void pci_init (void)
+void pci_init_board (void)
 {
 	cpc710_pci_init ();
 

board/pn62/pn62.c

@@ -137,7 +137,7 @@ long int initdram (int board_type)
 struct pci_controller hose = {
 };
 
-void pci_init (void)
+void pci_init_board (void)
 {
 	show_startup_phase (4);
 	pci_mpc824x_init (&hose);

board/sandpoint/sandpoint.c

@@ -121,7 +121,7 @@ struct pci_controller hose = {
 #endif
 };
 
-void pci_init(void)
+void pci_init_board(void)
 {
 	pci_mpc824x_init(&hose);
 }

board/sc520_cdp/sc520_cdp.c

@@ -133,7 +133,7 @@ static struct pci_controller sc520_cdp_hose = {
 	fixup_irq: pci_sc520_cdp_fixup_irq,
 };
 
-void pci_init(void)
+void pci_init_board(void)
 {
 	pci_sc520_init(&sc520_cdp_hose);
 }

board/utx8245/utx8245.c

@@ -143,7 +143,7 @@ static struct pci_controller utx8245_hose = {
 #endif /*CONFIG_PCI_PNP*/
 };
 
-void pci_init (void)
+void pci_init_board (void)
 {
 	pci_mpc824x_init(&utx8245_hose);
 

common/env_common.c

@@ -128,6 +128,9 @@ uchar default_environment[] = {
 #ifdef  CONFIG_CLOCKS_IN_MHZ
 	"clocks_in_mhz=1\0"
 #endif
+#if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0)
+	"pcidelay="	MK_STR(CONFIG_PCI_BOOTDELAY)	"\0"
+#endif
 #ifdef  CONFIG_EXTRA_ENV_SETTINGS
 	CONFIG_EXTRA_ENV_SETTINGS
 #endif

common/environment.c

@@ -164,6 +164,9 @@ env_t environment __PPCENV__ = {
 #ifdef	CONFIG_CLOCKS_IN_MHZ
 	"clocks_in_mhz=" "1"				"\0"
 #endif
+#if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0)
+	"pcidelay="	MK_STR(CONFIG_PCI_BOOTDELAY)	"\0"
+#endif
 #ifdef  CONFIG_EXTRA_ENV_SETTINGS
 	CONFIG_EXTRA_ENV_SETTINGS
 #endif

cpu/ppc4xx/405gp_pci.c

@@ -376,7 +376,7 @@ static struct pci_controller hose = {
 	config_table: pci_405gp_config_table,
 };
 
-void pci_init(void)
+void pci_init_board(void)
 {
 	/*we want the ptrs to RAM not flash (ie don't use init list)*/
 	hose.fixup_irq    = pci_405gp_fixup_irq;
@@ -494,7 +494,7 @@ void pci_440_init (struct pci_controller *hose)
 }
 
 
-void pci_init(void)
+void pci_init_board(void)
 {
 	pci_440_init (&ppc440_hose);
 }

drivers/pci.c

@@ -505,4 +505,23 @@ int pci_hose_scan(struct pci_controller *hose)
 	return pci_hose_scan_bus(hose, hose->first_busno);
 }
 
+void pci_init(void)
+{
+#if defined(CONFIG_PCI_BOOTDELAY)
+	char *s;
+	int i;
+
+	/* wait "pcidelay" ms (if defined)... */
+	s = getenv ("pcidelay");
+	if (s) {
+		int val = simple_strtoul (s, NULL, 10);
+		for (i=0; i<val; i++)
+			udelay (1000);
+	}
+#endif /* CONFIG_PCI_BOOTDELAY */
+
+	/* now call board specific pci_init()... */
+	pci_init_board();
+}
+
 #endif /* CONFIG_PCI */

include/common.h

@@ -153,6 +153,7 @@ void    setenv       (char *, char *);
 #endif /* CONFIG_I386 */
 
 void    pci_init      (void);
+void    pci_init_board(void);
 void    pciinfo       (int, int);
 
 #if defined(CONFIG_PCI) && defined(CONFIG_440)

include/configs/AR405.h

@@ -122,6 +122,10 @@
 #define CONFIG_PCI_PNP			/* do pci plug-and-play         */
                                         /* resource configuration       */
 
+#define CONFIG_PCI_SCAN_SHOW            /* print pci devices @ startup  */
+
+#define CONFIG_PCI_BOOTDELAY    0       /* enable pci bootdelay variable*/
+
 #define CFG_PCI_SUBSYS_VENDORID 0x12FE  /* PCI Vendor ID: esd gmbh      */
 #define CFG_PCI_SUBSYS_DEVICEID 0x0403  /* PCI Device ID: ARISTO405     */
 #define CFG_PCI_PTM1LA  0x00000000      /* point to sdram               */

include/configs/CPCI405.h

@@ -74,6 +74,7 @@
 				CFG_CMD_IRQ	| \
 				CFG_CMD_IDE	| \
 				CFG_CMD_ELF	| \
+				CFG_CMD_MII	| \
 				CFG_CMD_EEPROM  )
 
 #define CONFIG_MAC_PARTITION
@@ -144,6 +145,8 @@
 
 #define CONFIG_PCI_SCAN_SHOW            /* print pci devices @ startup  */
 
+#define CONFIG_PCI_BOOTDELAY    0       /* enable pci bootdelay variable*/
+
 #define CFG_PCI_SUBSYS_VENDORID 0x12FE  /* PCI Vendor ID: esd gmbh      */
 #define CFG_PCI_SUBSYS_DEVICEID 0x0405  /* PCI Device ID: CPCI-405      */
 #define CFG_PCI_SUBSYS_DEVICEID2 0x0406 /* PCI Device ID: CPCI-405-A    */

include/configs/CPCI4052.h

@@ -80,6 +80,7 @@
 				CFG_CMD_DATE	| \
 				CFG_CMD_JFFS2	| \
 				CFG_CMD_I2C	| \
+				CFG_CMD_MII	| \
 				CFG_CMD_EEPROM  )
 
 #define CONFIG_MAC_PARTITION
@@ -150,6 +151,8 @@
 
 #define CONFIG_PCI_SCAN_SHOW            /* print pci devices @ startup  */
 
+#define CONFIG_PCI_BOOTDELAY    0       /* enable pci bootdelay variable*/
+
 #define CFG_PCI_SUBSYS_VENDORID 0x12FE  /* PCI Vendor ID: esd gmbh      */
 #define CFG_PCI_SUBSYS_DEVICEID 0x0405  /* PCI Device ID: CPCI-405      */
 #define CFG_PCI_SUBSYS_DEVICEID2 0x0406 /* PCI Device ID: CPCI-405-A    */

include/configs/CPCI440.h

@@ -237,6 +237,10 @@
 #define CONFIG_PCI_PNP			/* do pci plug-and-play		*/
 					/* resource configuration	*/
 
+#define CONFIG_PCI_SCAN_SHOW            /* print pci devices @ startup  */
+
+#define CONFIG_PCI_BOOTDELAY    0       /* enable pci bootdelay variable*/
+
 #define CFG_PCI_SUBSYS_VENDORID 0x0000	/* PCI Vendor ID: to-do!!!	*/
 #define CFG_PCI_SUBSYS_DEVICEID 0x0000	/* PCI Device ID: to-do!!!	*/
 #define CFG_PCI_PTM1LA	0x00000000	/* point to sdram		*/

include/configs/DU405.h

@@ -120,6 +120,10 @@
 #define CONFIG_PCI_PNP			/* do pci plug-and-play         */
                                         /* resource configuration       */
 
+#define CONFIG_PCI_SCAN_SHOW            /* print pci devices @ startup  */
+
+#define CONFIG_PCI_BOOTDELAY    0       /* enable pci bootdelay variable*/
+
 #define CFG_PCI_SUBSYS_VENDORID 0x12FE  /* PCI Vendor ID: esd gmbh      */
 #define CFG_PCI_SUBSYS_DEVICEID 0x0404  /* PCI Device ID: CPCI-ISER4    */
 #define CFG_PCI_PTM1LA  0x00000000      /* point to sdram               */

include/configs/OCRTC.h

@@ -120,6 +120,8 @@
 
 #define CONFIG_PCI_SCAN_SHOW            /* print pci devices @ startup  */
 
+#define CONFIG_PCI_BOOTDELAY    0       /* enable pci bootdelay variable*/
+
 #define CFG_PCI_SUBSYS_VENDORID 0x12FE  /* PCI Vendor ID: esd gmbh      */
 #define CFG_PCI_SUBSYS_DEVICEID 0x0410  /* PCI Device ID: OCRTC         */
 #define CFG_PCI_CLASSCODE       0x0b20  /* PCI Class Code: Processor/PPC*/

tools/env/fw_env.c

@@ -142,6 +142,9 @@ static uchar default_environment[] = {
 #ifdef	CONFIG_CLOCKS_IN_MHZ
 	"clocks_in_mhz=" "1"				"\0"
 #endif
+#if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0)
+	"pcidelay="	MK_STR(CONFIG_PCI_BOOTDELAY)	"\0"
+#endif
 #ifdef  CONFIG_EXTRA_ENV_SETTINGS
 	CONFIG_EXTRA_ENV_SETTINGS
 #endif