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mmc: move DesignWare-based drivers to Kconfig
Move (and rename) the following CONFIG options to Kconfig: CONFIG_EXYNOS_DWMMC (renamed to CONFIG_MMC_DW_EXYNOS) CONFIG_HIKEY_DWMMC (renamed to CONFIG_MMC_DW_K3) CONFIG_SOCFPGA_DWMMC (renamed to CONFIG_MMC_DW_SOCFPGA) The "HIKEY" is a board name, so it is not suitable for the MMC controller name. I am following the name used in Linux. This commit was generated as follows: [1] Rename the config options with the following command: find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \ -type f -print | xargs sed -i -e ' s/CONFIG_EXYNOS_DWMMC/CONFIG_MMC_DW_EXYNOS/g s/CONFIG_HIKEY_DWMMC/CONFIG_MMC_DW_K3/g s/CONFIG_SOCFPGA_DWMMC/CONFIG_MMC_DW_SOCFPGA/g ' [2] Commit the changes [3] Create the entries in drivers/mmc/Kconfig (with default y for EXYNOS and SOCFPGA) [4] Run the following: tools/moveconfig.py -y -r HEAD MMC_DW_EXYNOS MMC_DW_K3 MMC_DW_SOCFPGA [5] Sort and align drivers/mmc/Makefile for readability [6] Clean-up doc/README.socfpga by hand Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de>
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parent
55ed3b4698
commit
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7 changed files with 34 additions and 11 deletions
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@ -11,5 +11,6 @@ CONFIG_CMD_USB=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_CACHE=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_K3=y
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CONFIG_USB=y
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CONFIG_USB_STORAGE=y
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@ -19,6 +19,3 @@ controller support within SOCFPGA
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#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256
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-> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM
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#define CONFIG_SOCFPGA_DWMMC
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-> Enable the SOCFPGA specific driver for DesignWare SDMMC controller
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@ -75,6 +75,24 @@ config MMC_DW
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block, this provides host support for SD and MMC interfaces, in both
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PIO, internal DMA mode and external DMA mode.
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config MMC_DW_EXYNOS
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bool "Exynos specific extensions for Synopsys DW Memory Card Interface"
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depends on ARCH_EXYNOS
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depends on MMC_DW
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default y
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help
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This selects support for Samsung Exynos SoC specific extensions to the
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Synopsys DesignWare Memory Card Interface driver. Select this option
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for platforms based on Exynos4 and Exynos5 SoC's.
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config MMC_DW_K3
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bool "K3 specific extensions for Synopsys DW Memory Card Interface"
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depends on MMC_DW
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help
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This selects support for Hisilicon K3 SoC specific extensions to the
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Synopsys DesignWare Memory Card Interface driver. Select this option
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for platforms based on Hisilicon K3 SoC's.
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config MMC_DW_ROCKCHIP
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bool "Rockchip SD/MMC controller support"
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depends on DM_MMC && OF_CONTROL
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@ -85,6 +103,16 @@ config MMC_DW_ROCKCHIP
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SD 3.0, SDIO 3.0 and MMC 4.5 and supports common eMMC chips as well
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as removeable SD and micro-SD cards.
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config MMC_DW_SOCFPGA
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bool "SOCFPGA specific extensions for Synopsys DW Memory Card Interface"
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depends on ARCH_SOCFPGA
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depends on MMC_DW
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default y
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help
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This selects support for Altera SOCFPGA specific extensions to the
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Synopsys DesignWare Memory Card Interface driver. Select this option
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for platforms based on Altera SOCFPGA.
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config SH_SDHI
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bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support"
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depends on RMOBILE
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@ -17,9 +17,11 @@ obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
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obj-$(CONFIG_ATMEL_SDHCI) += atmel_sdhci.o
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obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
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obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
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obj-$(CONFIG_MMC_DW) += dw_mmc.o
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obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
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obj-$(CONFIG_HIKEY_DWMMC) += hi6220_dw_mmc.o
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obj-$(CONFIG_MMC_DW) += dw_mmc.o
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obj-$(CONFIG_MMC_DW_EXYNOS) += exynos_dw_mmc.o
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obj-$(CONFIG_MMC_DW_K3) += hi6220_dw_mmc.o
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obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o
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obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o
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obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
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obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
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obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o
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@ -36,7 +38,6 @@ obj-$(CONFIG_MXS_MMC) += mxsmmc.o
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obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
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obj-$(CONFIG_X86) += pci_mmc.o
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obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
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obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o
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obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
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obj-$(CONFIG_S3C_SDI) += s3c_sdi.o
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ifdef CONFIG_BLK
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@ -46,7 +47,6 @@ endif
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endif
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obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
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obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
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obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o
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obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
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obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o
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obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
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@ -39,7 +39,6 @@
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/* SD/MMC configuration */
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#define CONFIG_GENERIC_MMC
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#define CONFIG_EXYNOS_DWMMC
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#define CONFIG_BOUNCE_BUFFER
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/* PWM */
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@ -72,7 +72,6 @@
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/* SD/MMC configuration */
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#define CONFIG_GENERIC_MMC
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#define CONFIG_HIKEY_DWMMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_FS_EXT4
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@ -144,7 +144,6 @@
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_GENERIC_MMC
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#define CONFIG_SOCFPGA_DWMMC
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/* FIXME */
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/* using smaller max blk cnt to avoid flooding the limited stack we have */
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#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 /* FIXME -- SPL only? */
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