mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-18 13:11:31 +00:00
Merge git://git.denx.de/u-boot-rockchip
This commit is contained in:
commit
af8ef2ed21
24 changed files with 439 additions and 15 deletions
|
@ -29,12 +29,12 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
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|||
dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
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||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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||||
rk3036-sdk.dtb \
|
||||
rk3188-radxarock.dtb \
|
||||
rk3288-evb.dtb \
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||||
rk3288-fennec.dtb \
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||||
rk3288-firefly.dtb \
|
||||
rk3288-miqi.dtb \
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||||
rk3288-popmetal.dtb \
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||||
rk3188-radxarock.dtb \
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||||
rk3288-rock2-square.dtb \
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rk3288-tinker.dtb \
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rk3288-veyron-jerry.dtb \
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|
|
|
@ -30,6 +30,13 @@
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status = "okay";
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};
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||||
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||||
vccsys: vccsys {
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compatible = "regulator-fixed";
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regulator-name = "vccsys";
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regulator-boot-on;
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regulator-always-on;
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};
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vcc3v3_sys: vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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@ -51,6 +58,7 @@
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regulator-name = "vcc5v0_host";
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gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
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};
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};
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&emmc_phy {
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@ -112,6 +120,37 @@
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <400000>;
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i2c-scl-falling-time-ns = <50>;
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i2c-scl-rising-time-ns = <100>;
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u-boot,dm-pre-reloc;
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rk808: pmic@1b {
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compatible = "rockchip,rk808";
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clock-output-names = "xin32k", "wifibt_32kin";
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interrupt-parent = <&gpio0>;
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interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l>;
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reg = <0x1b>;
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rockchip,system-power-controller;
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#clock-cells = <1>;
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u-boot,dm-pre-reloc;
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status = "okay";
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vcc12-supply = <&vcc3v3_sys>;
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regulators {
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vcc33_lcd: SWITCH_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc33_lcd";
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};
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};
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};
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};
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&pinctrl {
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pmic {
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pmic_int_l: pmic-int-l {
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@ -1,7 +1,7 @@
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/*
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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/dts-v1/;
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@ -91,7 +91,6 @@
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&sdmmc {
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u-boot,dm-pre-reloc;
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bus-width = <4>;
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fifo-mode; /* until we fix DMA in SPL */
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status = "okay";
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};
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|
|
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@ -26,6 +26,7 @@
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serial4 = &uart4;
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mmc0 = &sdhci;
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mmc1 = &sdmmc;
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i2c0 = &i2c0;
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};
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cpus {
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@ -668,6 +669,21 @@
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status = "disabled";
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};
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i2c0: i2c@ff3c0000 {
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compatible = "rockchip,rk3399-i2c";
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reg = <0x0 0xff3c0000 0x0 0x1000>;
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assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
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assigned-clock-rates = <200000000>;
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clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
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clock-names = "i2c", "pclk";
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interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_xfer>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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pinctrl: pinctrl {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3399-pinctrl";
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@ -337,6 +337,14 @@ enum {
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GRF_GPIO2B4_SEL_MASK = 3 << GRF_GPIO2B4_SEL_SHIFT,
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GRF_SPI2TPM_CSN0 = 1,
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/* GRF_GPIO2C_IOMUX */
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GRF_GPIO2C0_SEL_SHIFT = 0,
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GRF_GPIO2C0_SEL_MASK = 3 << GRF_GPIO2C0_SEL_SHIFT,
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GRF_UART0BT_SIN = 1,
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GRF_GPIO2C1_SEL_SHIFT = 2,
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GRF_GPIO2C1_SEL_MASK = 3 << GRF_GPIO2C1_SEL_SHIFT,
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GRF_UART0BT_SOUT = 1,
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/* GRF_GPIO3A_IOMUX */
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GRF_GPIO3A0_SEL_SHIFT = 0,
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GRF_GPIO3A0_SEL_MASK = 3 << GRF_GPIO3A0_SEL_SHIFT,
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|
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@ -18,6 +18,7 @@ config ROCKCHIP_RK3188
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select SUPPORT_TPL
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select SPL
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select TPL
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select BOARD_LATE_INIT
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select ROCKCHIP_BROM_HELPER
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help
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The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
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@ -55,6 +56,7 @@ config ROCKCHIP_RK3399
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select SPL
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select SPL_SEPARATE_BSS
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select ENABLE_ARM_SOC_BOOT0_HOOK
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select DEBUG_UART_BOARD_INIT
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help
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The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
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and quad-core Cortex-A53.
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@ -11,6 +11,7 @@
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#include <syscon.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/grf_rk3188.h>
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#include <asm/arch/periph.h>
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#include <asm/arch/pmu_rk3288.h>
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#include <asm/arch/boot_mode.h>
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@ -19,6 +20,23 @@
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DECLARE_GLOBAL_DATA_PTR;
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int board_late_init(void)
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{
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struct rk3188_grf *grf;
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grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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if (IS_ERR(grf)) {
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error("grf syscon returned %ld\n", PTR_ERR(grf));
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} else {
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/* enable noc remap to mimic legacy loaders */
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rk_clrsetreg(&grf->soc_con0,
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NOC_REMAP_MASK << NOC_REMAP_SHIFT,
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NOC_REMAP_MASK << NOC_REMAP_SHIFT);
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}
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return 0;
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}
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int board_init(void)
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{
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#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
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|
|
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@ -156,19 +156,24 @@ void secure_timer_init(void)
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writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
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}
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||||
#define GRF_EMMCCORE_CON11 0xff77f02c
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void board_init_f(ulong dummy)
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{
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||||
struct udevice *pinctrl;
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struct udevice *dev;
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int ret;
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||||
#define SGRF_DDR_RGN_CON16 0xff330040
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/* Example code showing how to enable the debug UART on RK3288 */
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void board_debug_uart_init(void)
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{
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#include <asm/arch/grf_rk3399.h>
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/* Enable early UART2 channel C on the RK3399 */
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#define GRF_BASE 0xff770000
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struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
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#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
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/* Enable early UART0 on the RK3399 */
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rk_clrsetreg(&grf->gpio2c_iomux,
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GRF_GPIO2C0_SEL_MASK,
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GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
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rk_clrsetreg(&grf->gpio2c_iomux,
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GRF_GPIO2C1_SEL_MASK,
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GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
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#else
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/* Enable early UART2 channel C on the RK3399 */
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rk_clrsetreg(&grf->gpio4c_iomux,
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GRF_GPIO4C3_SEL_MASK,
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GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
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@ -179,6 +184,16 @@ void board_init_f(ulong dummy)
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rk_clrsetreg(&grf->soc_con7,
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GRF_UART_DBG_SEL_MASK,
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GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
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#endif
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}
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#define GRF_EMMCCORE_CON11 0xff77f02c
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void board_init_f(ulong dummy)
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{
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struct udevice *pinctrl;
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struct udevice *dev;
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int ret;
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#define EARLY_UART
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#ifdef EARLY_UART
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/*
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@ -201,6 +216,17 @@ void board_init_f(ulong dummy)
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hang();
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}
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/*
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* Disable DDR security regions.
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*
|
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* As we are entered from the BootROM, the region from
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||||
* 0x0 through 0xfffff (i.e. the first MB of memory) will
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* be protected. This will cause issues with the DW_MMC
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* driver, which tries to DMA from/to the stack (likely)
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* located in this range.
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*/
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rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0);
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secure_timer_init();
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|
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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|
@ -238,6 +264,7 @@ void spl_board_init(void)
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#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
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back_to_bootrom();
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#endif
|
||||
|
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return;
|
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err:
|
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printf("spl_board_init: Error %d\n", ret);
|
||||
|
|
|
@ -10,6 +10,24 @@ config TARGET_EVB_RK3399
|
|||
with full function and phisical connectors support like type-C ports,
|
||||
usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial...
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||||
|
||||
config TARGET_PUMA_RK3399
|
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bool "Theobroma Systems RK3399-Q7 (Puma)"
|
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help
|
||||
The RK3399-Q7 (Puma) is a system-on-module (designed and
|
||||
marketed by Theobroma Systems) featuring the Rockchip RK3399
|
||||
in a Qseven-compatible form-factor (running of a single 5V
|
||||
supply and exposing its external interfaces on a MXM-230
|
||||
connector).
|
||||
|
||||
Key features of the RK3399-Q7 include:
|
||||
* on-module USB 3.0 hub (2x USB 3.0 host + 1x USB 2.0 host)
|
||||
* USB 3.0 dual-role
|
||||
* on-module Micrel KSZ9031 GbE PHY
|
||||
* on-module eMMC (up to 256GB configurations available)
|
||||
* on-module DDR3 (1GB, 2GB and 4GB configurations available)
|
||||
* HDMI, eDP, MIPI-DSI, MIPI-DSI/CSI and MIPI-CSI
|
||||
* SPI, I2C, I2S, UART, GPIO, ...
|
||||
|
||||
endchoice
|
||||
|
||||
config SYS_SOC
|
||||
|
@ -19,5 +37,6 @@ config SYS_MALLOC_F_LEN
|
|||
default 0x0800
|
||||
|
||||
source "board/rockchip/evb_rk3399/Kconfig"
|
||||
source "board/theobroma-systems/puma_rk3399/Kconfig"
|
||||
|
||||
endif
|
||||
|
|
|
@ -14,6 +14,7 @@ static const struct udevice_id rk3399_syscon_ids[] = {
|
|||
{ .compatible = "rockchip,rk3399-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF },
|
||||
{ .compatible = "rockchip,rk3399-pmusgrf", .data = ROCKCHIP_SYSCON_PMUSGRF },
|
||||
{ .compatible = "rockchip,rk3399-cic", .data = ROCKCHIP_SYSCON_CIC },
|
||||
{ }
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(syscon_rk3399) = {
|
||||
|
|
15
board/theobroma-systems/puma_rk3399/Kconfig
Normal file
15
board/theobroma-systems/puma_rk3399/Kconfig
Normal file
|
@ -0,0 +1,15 @@
|
|||
if TARGET_PUMA_RK3399
|
||||
|
||||
config SYS_BOARD
|
||||
default "puma_rk3399"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "theobroma-systems"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "puma_rk3399"
|
||||
|
||||
config BOARD_SPECIFIC_OPTIONS # dummy
|
||||
def_bool y
|
||||
|
||||
endif
|
10
board/theobroma-systems/puma_rk3399/MAINTAINERS
Normal file
10
board/theobroma-systems/puma_rk3399/MAINTAINERS
Normal file
|
@ -0,0 +1,10 @@
|
|||
PUMA-RK3399
|
||||
M: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
||||
M: Klaus Goger <klaus.goger@theobroma-systems.com>
|
||||
S: Maintained
|
||||
F: board/theobroma-systems/puma_rk3399
|
||||
F: include/configs/puma_rk3399.h
|
||||
F: arch/arm/dts/rk3399-puma.dts
|
||||
F: configs/puma-rk3399_defconfig
|
||||
W: https://www.theobroma-systems.com/rk3399-q7/tech-specs
|
||||
T: git git://git.theobroma-systems.com/puma-u-boot.git
|
7
board/theobroma-systems/puma_rk3399/Makefile
Normal file
7
board/theobroma-systems/puma_rk3399/Makefile
Normal file
|
@ -0,0 +1,7 @@
|
|||
#
|
||||
# (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y += puma-rk3399.o
|
73
board/theobroma-systems/puma_rk3399/README
Normal file
73
board/theobroma-systems/puma_rk3399/README
Normal file
|
@ -0,0 +1,73 @@
|
|||
Introduction
|
||||
============
|
||||
|
||||
The RK3399-Q7 (Puma) is a system-on-module featuring the Rockchip
|
||||
RK3399 in a Qseven-compatible form-factor.
|
||||
|
||||
RK3399-Q7 features:
|
||||
* CPU: ARMv8 64bit Big-Little architecture,
|
||||
* Big: dual-core Cortex-A72
|
||||
* Little: quad-core Cortex-A53
|
||||
* IRAM: 200KB
|
||||
* DRAM: 4GB-128MB dual-channel
|
||||
* eMMC: onboard eMMC
|
||||
* SD/MMC
|
||||
* GbE (onboard Micrel KSZ9031) Gigabit ethernet PHY
|
||||
* USB:
|
||||
* USB3.0 dual role port
|
||||
* 2x USB3.0 host, 1x USB2.0 host via onboard USB3.0 hub
|
||||
* Display: HDMI/eDP/MIPI
|
||||
* Camera: 2x CSI (one on the edge connector, one on the Q7 specified CSI ZIF)
|
||||
* NOR Flash: onboard SPI NOR
|
||||
* Companion Controller: onboard additional Cortex-M0 microcontroller
|
||||
* RTC
|
||||
* fan controller
|
||||
* CAN
|
||||
|
||||
Here is the step-by-step to boot to U-Boot on rk3399.
|
||||
|
||||
Get the Source and build ATF/Cortex-M0 binaries
|
||||
===============================================
|
||||
|
||||
> git clone git://git.theobroma-systems.com/arm-trusted-firmware.git
|
||||
> git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git
|
||||
|
||||
Compile the ATF
|
||||
===============
|
||||
|
||||
> cd arm-trusted-firmware
|
||||
> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
|
||||
> cp build/rk3399/release/bl31.bin ../u-boot
|
||||
|
||||
Compile the M0 firmware
|
||||
=======================
|
||||
|
||||
> cd ../rk3399-cortex-m0
|
||||
> make CROSS_COMPILE=arm-cortex_m0-eabi-
|
||||
> cp rk3399m0.bin ../u-boot
|
||||
|
||||
Compile the U-Boot
|
||||
==================
|
||||
|
||||
> cd ../u-boot
|
||||
> make CROSS_COMPILE=aarch64-linux-gnu- puma-rk3399_defconfig all
|
||||
|
||||
Package the image
|
||||
=================
|
||||
|
||||
> tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin spl.img
|
||||
> tools/mkimage -f board/theobroma/puma_rk3399/fit_spl_atf.its \
|
||||
-E rk3399_bl3x.itb
|
||||
|
||||
Flash the image
|
||||
===============
|
||||
|
||||
Copy the SPL to offset 32k and the FIT image containing the payloads
|
||||
(U-Boot proper, ATF, M0 Firmware, devicetree) to offset 256k on a SD
|
||||
card.
|
||||
|
||||
> dd if=spl.img of=/dev/sdb seek=64
|
||||
> dd if=rk3399_bl3x.itb of=/dev/sdb seek=512
|
||||
|
||||
After powering up the board (with the inserted SD card), you should see
|
||||
a U-Boot console on UART0 (115200n8).
|
57
board/theobroma-systems/puma_rk3399/fit_spl_atf.its
Normal file
57
board/theobroma-systems/puma_rk3399/fit_spl_atf.its
Normal file
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
* Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
|
||||
*
|
||||
* Minimal dts for a SPL FIT image payload.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+ X11
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
description = "FIT image with U-Boot proper, ATF bl31, M0 Firmware, DTB";
|
||||
#address-cells = <1>;
|
||||
|
||||
images {
|
||||
uboot@1 {
|
||||
description = "U-Boot (64-bit)";
|
||||
data = /incbin/("../../../u-boot-nodtb.bin");
|
||||
type = "standalone";
|
||||
arch = "arm64";
|
||||
compression = "none";
|
||||
load = <0x00200000>;
|
||||
};
|
||||
atf@1 {
|
||||
description = "ARM Trusted Firmware";
|
||||
data = /incbin/("../../../bl31.bin");
|
||||
type = "firmware";
|
||||
arch = "arm64";
|
||||
compression = "none";
|
||||
load = <0x00001000>;
|
||||
entry = <0x00001000>;
|
||||
};
|
||||
pmu@1 {
|
||||
description = "Cortex-M0 firmware";
|
||||
data = /incbin/("../../../rk3399m0.bin");
|
||||
type = "pmu-firmware";
|
||||
compression = "none";
|
||||
load = <0xff8c0000>;
|
||||
};
|
||||
fdt@1 {
|
||||
description = "RK3399-Q7 (Puma) flat device-tree";
|
||||
data = /incbin/("../../../u-boot.dtb");
|
||||
type = "flat_dt";
|
||||
compression = "none";
|
||||
};
|
||||
};
|
||||
|
||||
configurations {
|
||||
default = "conf@1";
|
||||
conf@1 {
|
||||
description = "Theobroma Systems RK3399-Q7 (Puma) SoM";
|
||||
firmware = "uboot@1";
|
||||
loadables = "atf@1";
|
||||
fdt = "fdt@1";
|
||||
};
|
||||
};
|
||||
};
|
71
board/theobroma-systems/puma_rk3399/puma-rk3399.c
Normal file
71
board/theobroma-systems/puma_rk3399/puma-rk3399.c
Normal file
|
@ -0,0 +1,71 @@
|
|||
/*
|
||||
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <dm/pinctrl.h>
|
||||
#include <dm/uclass-internal.h>
|
||||
#include <asm/arch/periph.h>
|
||||
#include <power/regulator.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
struct udevice *pinctrl, *regulator;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* The PWM does not have decicated interrupt number in dts and can
|
||||
* not get periph_id by pinctrl framework, so let's init them here.
|
||||
* The PWM2 and PWM3 are for pwm regulators.
|
||||
*/
|
||||
ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
|
||||
if (ret) {
|
||||
debug("%s: Cannot find pinctrl device\n", __func__);
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
|
||||
if (ret) {
|
||||
debug("%s PWM2 pinctrl init fail!\n", __func__);
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* rk3399 need to init vdd_center to get the correct output voltage */
|
||||
ret = regulator_get_by_platname("vdd_center", ®ulator);
|
||||
if (ret)
|
||||
debug("%s: Cannot get vdd_center regulator\n", __func__);
|
||||
|
||||
ret = regulator_get_by_platname("vcc5v0_host", ®ulator);
|
||||
if (ret) {
|
||||
debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = regulator_set_enable(regulator, true);
|
||||
if (ret) {
|
||||
debug("%s vcc5v0-host-en set fail!\n", __func__);
|
||||
goto out;
|
||||
}
|
||||
|
||||
out:
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dram_init(void)
|
||||
{
|
||||
gd->ram_size = 0x80000000;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dram_init_banksize(void)
|
||||
{
|
||||
/* Reserve 0x200000 for ATF bl31 */
|
||||
gd->bd->bi_dram[0].start = 0x200000;
|
||||
gd->bd->bi_dram[0].size = 0x7e000000;
|
||||
|
||||
return 0;
|
||||
}
|
|
@ -60,3 +60,9 @@ CONFIG_USB_EHCI_GENERIC=y
|
|||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_CHILDREN=y
|
||||
CONFIG_SPL_PMIC_CHILDREN=y
|
||||
CONFIG_PMIC_RK808=y
|
||||
CONFIG_REGULATOR_RK808=y
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_TARGET_PUMA_RK3399=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x4000
|
||||
|
@ -11,7 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma"
|
|||
CONFIG_FIT=y
|
||||
CONFIG_SPL_FIT=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3399/fit_spl_atf.its"
|
||||
CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/puma_rk3399/fit_spl_atf.its"
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
|
|
|
@ -383,6 +383,7 @@ static const struct udevice_id rockchip_i2c_ids[] = {
|
|||
{ .compatible = "rockchip,rk3066-i2c" },
|
||||
{ .compatible = "rockchip,rk3188-i2c" },
|
||||
{ .compatible = "rockchip,rk3288-i2c" },
|
||||
{ .compatible = "rockchip,rk3399-i2c" },
|
||||
{ }
|
||||
};
|
||||
|
||||
|
|
|
@ -7,21 +7,36 @@
|
|||
#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <errno.h>
|
||||
#include <syscon.h>
|
||||
#include <sysreset.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/cru_rk3188.h>
|
||||
#include <asm/arch/grf_rk3188.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type)
|
||||
{
|
||||
struct rk3188_cru *cru = rockchip_get_cru();
|
||||
struct rk3188_grf *grf;
|
||||
|
||||
if (IS_ERR(cru))
|
||||
return PTR_ERR(cru);
|
||||
switch (type) {
|
||||
case SYSRESET_WARM:
|
||||
grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
|
||||
if (IS_ERR(grf))
|
||||
return -EPROTONOSUPPORT;
|
||||
|
||||
/*
|
||||
* warm-reset keeps the remap value,
|
||||
* so make sure it's disabled.
|
||||
*/
|
||||
rk_clrsetreg(&grf->soc_con0,
|
||||
NOC_REMAP_MASK << NOC_REMAP_SHIFT,
|
||||
0 << NOC_REMAP_SHIFT);
|
||||
|
||||
rk_clrreg(&cru->cru_mode_con, 0xffff);
|
||||
writel(0xeca8, &cru->cru_glb_srst_snd_value);
|
||||
break;
|
||||
|
|
27
include/configs/puma_rk3399.h
Normal file
27
include/configs/puma_rk3399.h
Normal file
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __PUMA_RK3399_H
|
||||
#define __PUMA_RK3399_H
|
||||
|
||||
#include <configs/rk3399_common.h>
|
||||
|
||||
/*
|
||||
* SPL @ 32kB for ~130kB
|
||||
* ENV @ 240KB for 8kB
|
||||
* FIT payload (ATF, U-Boot, FDT) @ 256kB
|
||||
*/
|
||||
#undef CONFIG_ENV_OFFSET
|
||||
#define CONFIG_ENV_OFFSET (240 * 1024)
|
||||
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 1
|
||||
|
||||
#define SDRAM_BANK_SIZE (2UL << 30)
|
||||
|
||||
#define CONFIG_SYS_WHITE_ON_BLACK
|
||||
|
||||
#endif
|
|
@ -57,8 +57,8 @@
|
|||
#ifndef CONFIG_SPL_BUILD
|
||||
|
||||
#define ENV_MEM_LAYOUT_SETTINGS \
|
||||
"scriptaddr=0x00000000\0" \
|
||||
"pxefile_addr_r=0x00100000\0" \
|
||||
"scriptaddr=0x00500000\0" \
|
||||
"pxefile_addr_r=0x00600000\0" \
|
||||
"fdt_addr_r=0x01f00000\0" \
|
||||
"kernel_addr_r=0x02000000\0" \
|
||||
"ramdisk_addr_r=0x04000000\0"
|
||||
|
|
|
@ -12,11 +12,20 @@
|
|||
#include <config_distro_defaults.h>
|
||||
|
||||
/* First try to boot from SD (index 0), then eMMC (index 1 */
|
||||
#ifdef CONFIG_CMD_USB
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
func(MMC, mmc, 0) \
|
||||
func(MMC, mmc, 1) \
|
||||
func(USB, usb, 0) \
|
||||
func(PXE, pxe, na) \
|
||||
func(DHCP, dchp, na)
|
||||
#else
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
func(MMC, mmc, 0) \
|
||||
func(MMC, mmc, 1) \
|
||||
func(PXE, pxe, na) \
|
||||
func(DHCP, dchp, na)
|
||||
#endif
|
||||
|
||||
#define CONFIG_RANDOM_UUID
|
||||
#define PARTS_DEFAULT \
|
||||
|
|
|
@ -13,7 +13,10 @@
|
|||
#undef BOOT_TARGET_DEVICES
|
||||
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
func(MMC, mmc, 1)
|
||||
func(MMC, mmc, 1) \
|
||||
func(USB, usb, 0) \
|
||||
func(PXE, pxe, na) \
|
||||
func(DHCP, dchp, na)
|
||||
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 1
|
||||
|
|
Loading…
Add table
Reference in a new issue