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mmc: s5p_sdhci: set the SDHCI_QUIRK_BROKEN_R1B

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Samsung SoC is broken busy waiting for R1b type.
And clk delay control value is modified the previosuly value.
(that value used at the s5p_mmc.c)

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
Jaehoon Chung 2012-08-30 16:24:08 +00:00 • committed by Andy Fleming
parent 470dcc7511
commit b268660ced
1 changed files with 4 additions and 6 deletions
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8
drivers/mmc/s5p_sdhci.c
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@ -54,7 +54,7 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
* 00 = Delay3 (inverter delay) * 00 = Delay3 (inverter delay)
* 10 = Delay4 (inverter delay + 2ns) * 10 = Delay4 (inverter delay + 2ns)
*/ */
val = SDHCI_CTRL3_FCSEL3 | SDHCI_CTRL3_FCSEL1; val = SDHCI_CTRL3_FCSEL0 | SDHCI_CTRL3_FCSEL1;
sdhci_writel(host, val, SDHCI_CONTROL3); sdhci_writel(host, val, SDHCI_CONTROL3);
/* /*
@ -82,11 +82,9 @@ int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks)
host->ioaddr = (void *)regbase; host->ioaddr = (void *)regbase;
host->quirks = quirks; host->quirks = quirks;
host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE; host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR;
host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
if (quirks & SDHCI_QUIRK_REG32_RW)
host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16;
else
host->version = sdhci_readw(host, SDHCI_HOST_VERSION); host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
host->set_control_reg = &s5p_sdhci_set_control_reg; host->set_control_reg = &s5p_sdhci_set_control_reg;