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treewide: Update fsl qspi node dt properties as per spi-mem driver

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According to new qspi driver, some properties like "bus-num, num-cs,
big-endian" are no longer used. Device endiannes can be determined from
device-type data in driver.

Now use board specific compatibles, generic node names and specific
labels to align with linux device-tree properties.

Also consolidate spi-max-frequency to 50Mhz treewide.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Kuldeep Singh 2019-12-12 11:49:24 +05:30 • committed by Priyanka Jain
parent 160e3b38e9
commit b480bcca80
19 changed files with 35 additions and 56 deletions
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5
arch/arm/dts/fsl-ls1012a-2g5rdb.dts
View file

@ -21,14 +21,13 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fl128s@0 {
s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
spi-max-frequency = <50000000>;
reg = <0>;
};
};

5
arch/arm/dts/fsl-ls1012a-frdm.dtsi
View file

@ -15,14 +15,13 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fl128s@0 {
s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
spi-max-frequency = <50000000>;
reg = <0>;
};
};

5
arch/arm/dts/fsl-ls1012a-qds.dtsi
View file

@ -43,14 +43,13 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fl128s@0 {
s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
spi-max-frequency = <50000000>;
reg = <0>;
};
};

5
arch/arm/dts/fsl-ls1012a-rdb.dtsi
View file

@ -19,14 +19,13 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fl128s@0 {
s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
spi-max-frequency = <50000000>;
reg = <0>;
};
};

4
arch/arm/dts/fsl-ls1012a.dtsi
View file

@ -107,14 +107,12 @@
};
qspi: quadspi@1550000 {
compatible = "fsl,vf610-qspi";
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x1550000 0x0 0x10000>,
<0x0 0x40000000 0x0 0x4000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
num-cs = <1>;
big-endian;
status = "disabled";
};

5
arch/arm/dts/fsl-ls1043a-qds.dtsi
View file

@ -53,14 +53,13 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fl128s@0 {
s25fl128s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
spi-max-frequency = <50000000>;
reg = <0>;
};
};

6
arch/arm/dts/fsl-ls1043a.dtsi
View file

@ -210,14 +210,12 @@
status = "disabled";
};
qspi: quadspi@1550000 {
compatible = "fsl,vf610-qspi";
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x1550000 0x0 0x10000>,
<0x0 0x40000000 0x0 0x4000000>;
<0x0 0x40000000 0x0 0x1000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
num-cs = <2>;
big-endian;
status = "disabled";
};

5
arch/arm/dts/fsl-ls1046a-frwy.dts
View file

@ -19,13 +19,12 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: mt25qu512abb8esf@0 {
mt25qu512a0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
};

5
arch/arm/dts/fsl-ls1046a-qds.dtsi
View file

@ -53,14 +53,13 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fl128s@0 {
s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
spi-max-frequency = <50000000>;
reg = <0>;
};
};

5
arch/arm/dts/fsl-ls1046a-rdb.dts
View file

@ -21,10 +21,9 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fs512s@0 {
s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@ -32,7 +31,7 @@
reg = <0>;
};
qflash1: s25fs512s@1 {
s25fs512s1: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

4
arch/arm/dts/fsl-ls1046a.dtsi
View file

@ -211,14 +211,12 @@
};
qspi: quadspi@1550000 {
compatible = "fsl,vf610-qspi";
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x1550000 0x0 0x10000>,
<0x0 0x40000000 0x0 0x10000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
num-cs = <4>;
big-endian;
status = "disabled";
};

5
arch/arm/dts/fsl-ls1088a-qds.dts
View file

@ -108,10 +108,9 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fs512s@0 {
s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@ -119,7 +118,7 @@
reg = <0>;
};
qflash1: s25fs512s@1 {
s25fs512s1: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

5
arch/arm/dts/fsl-ls1088a-rdb.dts
View file

@ -143,10 +143,9 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fs512s@0 {
s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@ -154,7 +153,7 @@
reg = <0>;
};
qflash1: s25fs512s@1 {
s25fs512s1: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

2
arch/arm/dts/fsl-ls1088a.dtsi
View file

@ -92,7 +92,7 @@
};
qspi: quadspi@1550000 {
compatible = "fsl,vf610-qspi";
compatible = "fsl,ls1088a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x20c0000 0x0 0x10000>,

5
arch/arm/dts/fsl-ls2080a-qds.dts
View file

@ -72,14 +72,13 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fs256s@0 {
s25fs256s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
spi-max-frequency = <50000000>;
reg = <0>;
};
};

4
arch/arm/dts/fsl-ls2080a.dtsi
View file

@ -96,13 +96,13 @@
};
qspi: quadspi@1550000 {
compatible = "fsl,vf610-qspi";
compatible = "fsl,ls2080a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x20c0000 0x0 0x10000>,
<0x0 0x20000000 0x0 0x10000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
num-cs = <4>;
status = "disabled";
};
esdhc: esdhc@0 {

5
arch/arm/dts/fsl-ls2088a-rdb-qspi.dts
View file

@ -125,10 +125,9 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fs512s@0 {
s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@ -136,7 +135,7 @@
reg = <0>;
};
qflash1: s25fs512s@1 {
s25fs512s1: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

5
arch/arm/dts/ls1021a-twr.dtsi
View file

@ -24,14 +24,13 @@
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: n25q128a13@0 {
n25q128a130: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
spi-max-frequency = <50000000>;
reg = <0>;
};
};

6
arch/arm/dts/ls1021a.dtsi
View file

@ -169,14 +169,12 @@
};
qspi: quadspi@1550000 {
compatible = "fsl,vf610-qspi";
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1550000 0x10000>,
<0x40000000 0x4000000>;
<0x40000000 0x1000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
num-cs = <2>;
big-endian;
status = "disabled";
};