GitHub-Mirror/u-boot
2
0
Fork 0
mirror of https://github.com/Fishwaldo/u-boot.git synced 2025-03-21 22:51:37 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

arch/powerpc: Simplify some calculations using ARRAY_SIZE() macro.

Browse source 
Replace a number of array length calculations with the ARRAY_SIZE()
macro, for clarity.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Robert P. J. Day 2016-05-23 06:49:21 -04:00 • committed by York Sun
parent 5349928277
commit b7707b043e
9 changed files with 14 additions and 14 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
arch/powerpc/cpu/mpc512x/fixed_sdram.c
View file

@ -70,7 +70,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
mddrc_config = &default_mddrc_config; mddrc_config = &default_mddrc_config;
if (dram_init_seq == NULL) { if (dram_init_seq == NULL) {
dram_init_seq = default_init_seq; dram_init_seq = default_init_seq;
seq_sz = sizeof(default_init_seq)/sizeof(u32); seq_sz = ARRAY_SIZE(default_init_seq);
} }
/* Initialize IO Control */ /* Initialize IO Control */

2
arch/powerpc/cpu/mpc8260/cpu_init.c
View file

@ -253,7 +253,7 @@ int prt_8260_rsr (void)
RSR_ESRS, "External Soft"}, { RSR_ESRS, "External Soft"}, {
RSR_EHRS, "External Hard"} RSR_EHRS, "External Hard"}
}; };
static int n = sizeof bits / sizeof bits[0]; static int n = ARRAY_SIZE(bits);
ulong rsr = gd->arch.reset_status; ulong rsr = gd->arch.reset_status;
int i; int i;
char *sep; char *sep;

8
arch/powerpc/cpu/mpc8260/ether_fcc.c
View file

@ -362,7 +362,7 @@ int fec_initialize(bd_t *bis)
struct eth_device* dev; struct eth_device* dev;
int i; int i;
for (i = 0; i < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); i++) for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++)
{ {
dev = (struct eth_device*) malloc(sizeof *dev); dev = (struct eth_device*) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev); memset(dev, 0, sizeof *dev);
@ -432,7 +432,7 @@ static elbt_prdesc rxeacc_descs[] = {
{ offsetof(elbt_rxeacc, badlen), "Bad Frame Length" }, { offsetof(elbt_rxeacc, badlen), "Bad Frame Length" },
{ offsetof(elbt_rxeacc, badbit), "Data Compare Errors" }, { offsetof(elbt_rxeacc, badbit), "Data Compare Errors" },
}; };
static int rxeacc_ndesc = sizeof (rxeacc_descs) / sizeof (rxeacc_descs[0]); static int rxeacc_ndesc = ARRAY_SIZE(rxeacc_descs);
typedef typedef
struct { struct {
@ -449,7 +449,7 @@ static elbt_prdesc txeacc_descs[] = {
{ offsetof(elbt_txeacc, un), "Underrun" }, { offsetof(elbt_txeacc, un), "Underrun" },
{ offsetof(elbt_txeacc, csl), "Carrier Sense Lost" }, { offsetof(elbt_txeacc, csl), "Carrier Sense Lost" },
}; };
static int txeacc_ndesc = sizeof (txeacc_descs) / sizeof (txeacc_descs[0]); static int txeacc_ndesc = ARRAY_SIZE(txeacc_descs);
typedef typedef
struct { struct {
@ -500,7 +500,7 @@ static elbt_prdesc epram_descs[] = {
{ offsetof(fcc_enet_t, fen_p512c), "512-1023 Octet Frames" }, { offsetof(fcc_enet_t, fen_p512c), "512-1023 Octet Frames" },
{ offsetof(fcc_enet_t, fen_p1024c), "1024-1518 Octet Frames"}, { offsetof(fcc_enet_t, fen_p1024c), "1024-1518 Octet Frames"},
}; };
static int epram_ndesc = sizeof (epram_descs) / sizeof (epram_descs[0]); static int epram_ndesc = ARRAY_SIZE(epram_descs);
/* /*
* given an elbt_prdesc array and an array of base addresses, print * given an elbt_prdesc array and an array of base addresses, print

2
arch/powerpc/cpu/mpc83xx/cpu_init.c
View file

@ -484,7 +484,7 @@ int prt_83xx_rsr(void)
RSR_SRS, "External/Internal Soft"}, { RSR_SRS, "External/Internal Soft"}, {
RSR_HRS, "External/Internal Hard"} RSR_HRS, "External/Internal Hard"}
}; };
static int n = sizeof bits / sizeof bits[0]; static int n = ARRAY_SIZE(bits);
ulong rsr = gd->arch.reset_status; ulong rsr = gd->arch.reset_status;
int i; int i;
char *sep; char *sep;

2
arch/powerpc/cpu/mpc83xx/speed.c
View file

@ -412,7 +412,7 @@ int get_clocks(void)
#endif #endif
corecnf_tab_index = ((corepll & 0x1F) << 2) | ((corepll & 0x60) >> 5); corecnf_tab_index = ((corepll & 0x1F) << 2) | ((corepll & 0x60) >> 5);
if (corecnf_tab_index > (sizeof(corecnf_tab) / sizeof(corecnf_t))) { if (corecnf_tab_index > (ARRAY_SIZE(corecnf_tab))) {
/* corecnf_tab_index is too high, possibly wrong value */ /* corecnf_tab_index is too high, possibly wrong value */
return -11; return -11;
} }

2
arch/powerpc/cpu/mpc85xx/ether_fcc.c
View file

@ -424,7 +424,7 @@ int fec_initialize(bd_t *bis)
struct eth_device* dev; struct eth_device* dev;
int i; int i;
for (i = 0; i < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); i++) for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++)
{ {
dev = (struct eth_device*) malloc(sizeof *dev); dev = (struct eth_device*) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev); memset(dev, 0, sizeof *dev);

4
arch/powerpc/cpu/mpc8xx/fec.c
View file

@ -137,7 +137,7 @@ int fec_initialize(bd_t *bis)
struct ether_fcc_info_s *efis; struct ether_fcc_info_s *efis;
int i; int i;
for (i = 0; i < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); i++) { for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++) {
dev = malloc(sizeof(*dev)); dev = malloc(sizeof(*dev));
if (dev == NULL) if (dev == NULL)
@ -879,7 +879,7 @@ void mii_init (void)
/* Setup the pin configuration of the FEC(s) /* Setup the pin configuration of the FEC(s)
*/ */
for (i = 0; i < sizeof(ether_fcc_info) / sizeof(ether_fcc_info[0]); i++) for (i = 0; i < ARRAY_SIZE(ether_fcc_info); i++)
fec_pin_init(ether_fcc_info[i].ether_index); fec_pin_init(ether_fcc_info[i].ether_index);
} }

2
arch/powerpc/cpu/ppc4xx/reginfo.c
View file

@ -321,7 +321,7 @@ void ppc4xx_reginfo(void)
PRINT_DCR(OPB2PLB40_BCTRL); PRINT_DCR(OPB2PLB40_BCTRL);
PRINT_DCR(P4P3BO0_CFG); PRINT_DCR(P4P3BO0_CFG);
#endif #endif
n = sizeof(ppc4xx_reg) / sizeof(ppc4xx_reg[0]); n = ARRAY_SIZE(ppc4xx_reg);
for (i = 0; i < n; i++) { for (i = 0; i < n; i++) {
value = 0; value = 0;
type = ppc4xx_reg[i].type; type = ppc4xx_reg[i].type;

4
arch/powerpc/cpu/ppc4xx/sdram.c
View file

@ -33,7 +33,7 @@ sdram_conf_t mb0cf[] = {
sdram_conf_t mb0cf[] = CONFIG_SYS_SDRAM_TABLE; sdram_conf_t mb0cf[] = CONFIG_SYS_SDRAM_TABLE;
#endif #endif
#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0])) #define N_MB0CF (ARRAY_SIZE(mb0cf))
#ifdef CONFIG_SYS_SDRAM_CASL #ifdef CONFIG_SYS_SDRAM_CASL
static ulong ns2clks(ulong ns) static ulong ns2clks(ulong ns)
@ -266,7 +266,7 @@ sdram_conf_t mb0cf[] = CONFIG_SYS_SDRAM_TABLE;
#define CONFIG_SYS_SDRAM0_CFG0 0x82000000 /* DCEN=1, PMUD=0, 64-bit */ #define CONFIG_SYS_SDRAM0_CFG0 0x82000000 /* DCEN=1, PMUD=0, 64-bit */
#endif #endif
#define N_MB0CF (sizeof(mb0cf) / sizeof(mb0cf[0])) #define N_MB0CF (ARRAY_SIZE(mb0cf))
#define NUM_TRIES 64 #define NUM_TRIES 64
#define NUM_READS 10 #define NUM_READS 10