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https://github.com/Fishwaldo/u-boot.git
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Merge branch 'master' of /home/wd/git/u-boot/custodians
This commit is contained in:
commit
b91b8f74fe
5 changed files with 54 additions and 69 deletions
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@ -72,15 +72,7 @@ lowlevel_init:
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/* set DDR-SDRAM dummy read */
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/* set DDR-SDRAM dummy read */
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write32 MMSEL_A, MMSEL_D
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write32 MMSEL_A, MMSEL_D
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mov.l MMSEL_A, r0
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write32 MMSEL_A, CS0_A
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synco
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mov.l @r0, r1
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synco
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mov.l CS0_A, r0
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synco
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mov.l @r0, r1
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synco
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/* set DDR-SDRAM bus/endian etc */
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/* set DDR-SDRAM bus/endian etc */
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write32 MIM_U_A, MIM_U_D
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write32 MIM_U_A, MIM_U_D
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@ -178,60 +178,6 @@ lbsc_end:
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.align 4
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.align 4
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/*------- LBSC -------*/
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MMSELR_A: .long 0xfc400020
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#if defined(CONFIG_SH_32BIT)
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MMSELR_D: .long 0xa5a50005
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#else
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MMSELR_D: .long 0xa5a50002
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#endif
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/*------- DBSC2 -------*/
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#define DBSC2_BASE 0xfe800000
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DBSC2_DBSTATE_A: .long DBSC2_BASE + 0x0c
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DBSC2_DBEN_A: .long DBSC2_BASE + 0x10
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DBSC2_DBCMDCNT_A: .long DBSC2_BASE + 0x14
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DBSC2_DBCONF_A: .long DBSC2_BASE + 0x20
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DBSC2_DBTR0_A: .long DBSC2_BASE + 0x30
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DBSC2_DBTR1_A: .long DBSC2_BASE + 0x34
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DBSC2_DBTR2_A: .long DBSC2_BASE + 0x38
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DBSC2_DBRFCNT0_A: .long DBSC2_BASE + 0x40
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DBSC2_DBRFCNT1_A: .long DBSC2_BASE + 0x44
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DBSC2_DBRFCNT2_A: .long DBSC2_BASE + 0x48
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DBSC2_DBRFSTS_A: .long DBSC2_BASE + 0x4c
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DBSC2_DBFREQ_A: .long DBSC2_BASE + 0x50
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DBSC2_DBDICODTOCD_A: .long DBSC2_BASE + 0x54
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DBSC2_DBMRCNT_A: .long DBSC2_BASE + 0x60
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DDR_DUMMY_ACCESS_A: .long 0x40000000
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DBSC2_DBCONF_D: .long 0x00630002
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DBSC2_DBTR0_D: .long 0x050b1f04
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DBSC2_DBTR1_D: .long 0x00040204
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DBSC2_DBTR2_D: .long 0x02100308
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DBSC2_DBFREQ_D1: .long 0x00000000
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DBSC2_DBFREQ_D2: .long 0x00000100
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DBSC2_DBDICODTOCD_D: .long 0x000f0907
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DBSC2_DBCMDCNT_D_CKE_H: .long 0x00000003
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DBSC2_DBCMDCNT_D_PALL: .long 0x00000002
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DBSC2_DBCMDCNT_D_REF: .long 0x00000004
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DBSC2_DBMRCNT_D_EMRS2: .long 0x00020000
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DBSC2_DBMRCNT_D_EMRS3: .long 0x00030000
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DBSC2_DBMRCNT_D_EMRS1_1: .long 0x00010006
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DBSC2_DBMRCNT_D_EMRS1_2: .long 0x00010386
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DBSC2_DBMRCNT_D_MRS_1: .long 0x00000952
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DBSC2_DBMRCNT_D_MRS_2: .long 0x00000852
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DBSC2_DBEN_D: .long 0x00000001
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DBSC2_DBPDCNT0_D3: .long 0x00000080
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DBSC2_DBRFCNT1_D: .long 0x00000926
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DBSC2_DBRFCNT2_D: .long 0x00fe00fe
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DBSC2_DBRFCNT0_D: .long 0x00010000
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WAIT_200US: .long 33333
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/*------- GPIO -------*/
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/*------- GPIO -------*/
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PACR_D: .long 0x0000
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PACR_D: .long 0x0000
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PBCR_D: .long 0x0000
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PBCR_D: .long 0x0000
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@ -291,6 +237,59 @@ PPUPR2_A: .long GPIO_BASE + 0x62
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P1MSELR_A: .long GPIO_BASE + 0x80
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P1MSELR_A: .long GPIO_BASE + 0x80
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P2MSELR_A: .long GPIO_BASE + 0x82
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P2MSELR_A: .long GPIO_BASE + 0x82
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MMSELR_A: .long 0xfc400020
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#if defined(CONFIG_SH_32BIT)
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MMSELR_D: .long 0xa5a50005
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#else
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MMSELR_D: .long 0xa5a50002
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#endif
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/*------- DBSC2 -------*/
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#define DBSC2_BASE 0xfe800000
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DBSC2_DBSTATE_A: .long DBSC2_BASE + 0x0c
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DBSC2_DBEN_A: .long DBSC2_BASE + 0x10
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DBSC2_DBCMDCNT_A: .long DBSC2_BASE + 0x14
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DBSC2_DBCONF_A: .long DBSC2_BASE + 0x20
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DBSC2_DBTR0_A: .long DBSC2_BASE + 0x30
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DBSC2_DBTR1_A: .long DBSC2_BASE + 0x34
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DBSC2_DBTR2_A: .long DBSC2_BASE + 0x38
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DBSC2_DBRFCNT0_A: .long DBSC2_BASE + 0x40
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DBSC2_DBRFCNT1_A: .long DBSC2_BASE + 0x44
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DBSC2_DBRFCNT2_A: .long DBSC2_BASE + 0x48
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DBSC2_DBRFSTS_A: .long DBSC2_BASE + 0x4c
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DBSC2_DBFREQ_A: .long DBSC2_BASE + 0x50
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DBSC2_DBDICODTOCD_A:.long DBSC2_BASE + 0x54
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DBSC2_DBMRCNT_A: .long DBSC2_BASE + 0x60
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DDR_DUMMY_ACCESS_A: .long 0x40000000
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DBSC2_DBCONF_D: .long 0x00630002
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DBSC2_DBTR0_D: .long 0x050b1f04
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DBSC2_DBTR1_D: .long 0x00040204
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DBSC2_DBTR2_D: .long 0x02100308
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DBSC2_DBFREQ_D1: .long 0x00000000
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DBSC2_DBFREQ_D2: .long 0x00000100
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DBSC2_DBDICODTOCD_D:.long 0x000f0907
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DBSC2_DBCMDCNT_D_CKE_H: .long 0x00000003
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DBSC2_DBCMDCNT_D_PALL: .long 0x00000002
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DBSC2_DBCMDCNT_D_REF: .long 0x00000004
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DBSC2_DBMRCNT_D_EMRS2: .long 0x00020000
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DBSC2_DBMRCNT_D_EMRS3: .long 0x00030000
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DBSC2_DBMRCNT_D_EMRS1_1: .long 0x00010006
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DBSC2_DBMRCNT_D_EMRS1_2: .long 0x00010386
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DBSC2_DBMRCNT_D_MRS_1: .long 0x00000952
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DBSC2_DBMRCNT_D_MRS_2: .long 0x00000852
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DBSC2_DBEN_D: .long 0x00000001
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DBSC2_DBPDCNT0_D3: .long 0x00000080
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DBSC2_DBRFCNT1_D: .long 0x00000926
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DBSC2_DBRFCNT2_D: .long 0x00fe00fe
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DBSC2_DBRFCNT0_D: .long 0x00010000
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WAIT_200US: .long 33333
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/*------- LBSC -------*/
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/*------- LBSC -------*/
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PASCR_A: .long 0xff000070
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PASCR_A: .long 0xff000070
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PASCR_32BIT_MODE: .long 0x80000000 /* check booting mode */
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PASCR_32BIT_MODE: .long 0x80000000 /* check booting mode */
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@ -49,7 +49,6 @@ DECLARE_GLOBAL_DATA_PTR;
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*/
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*/
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extern void malloc_bin_reloc (void);
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typedef int (init_fnc_t) (void);
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typedef int (init_fnc_t) (void);
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@ -115,7 +114,6 @@ void board_init (void)
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/* The Malloc area is immediately below the monitor copy in RAM */
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/* The Malloc area is immediately below the monitor copy in RAM */
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mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
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mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
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malloc_bin_reloc();
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WATCHDOG_RESET ();
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WATCHDOG_RESET ();
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bd->bi_flashsize = flash_init();
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bd->bi_flashsize = flash_init();
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@ -52,7 +52,6 @@ DECLARE_GLOBAL_DATA_PTR;
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*/
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*/
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extern void malloc_bin_reloc (void);
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typedef int (init_fnc_t) (void);
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typedef int (init_fnc_t) (void);
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@ -121,7 +120,6 @@ void board_init (void)
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/* The Malloc area is immediately below the monitor copy in RAM */
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/* The Malloc area is immediately below the monitor copy in RAM */
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mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
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mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
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malloc_bin_reloc();
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WATCHDOG_RESET ();
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WATCHDOG_RESET ();
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bd->bi_flashsize = flash_init();
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bd->bi_flashsize = flash_init();
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@ -32,7 +32,6 @@
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#include <miiphy.h>
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#include <miiphy.h>
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#endif
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#endif
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extern void malloc_bin_reloc (void);
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extern int cpu_init(void);
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extern int cpu_init(void);
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extern int board_init(void);
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extern int board_init(void);
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extern int dram_init(void);
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extern int dram_init(void);
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@ -92,7 +91,6 @@ static int sh_mem_env_init(void)
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{
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{
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mem_malloc_init(TEXT_BASE - CONFIG_SYS_GBL_DATA_SIZE -
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mem_malloc_init(TEXT_BASE - CONFIG_SYS_GBL_DATA_SIZE -
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CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN - 16);
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CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN - 16);
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malloc_bin_reloc();
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env_relocate();
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env_relocate();
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jumptable_init();
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jumptable_init();
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return 0;
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return 0;
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