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mmc: renesas: Unconditionally set DTCNTL TAPNUM to 8
According to latest specification rev.0026 and after confirmation with HW engineer, the DTCNTL register TAPNUM field must be set to 8 even on H3 ES2.0 SoC. Make it so. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
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@ -137,7 +137,7 @@ static int renesas_sdhi_hs400(struct udevice *dev)
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tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_TMPPORT2);
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tmio_sd_writel(priv, (taps << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) |
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tmio_sd_writel(priv, (0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) |
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RENESAS_SDHI_SCC_DTCNTL_TAPEN,
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RENESAS_SDHI_SCC_DTCNTL);
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