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ARM: tegra: import latest Jetson TK1 spreadsheet
This imports v11 of "Jetson TK1 Development Platform Pin Mux" from https://developer.nvidia.com/embedded/downloads. The new version defines the mux option for the MIPI pad ctrl selection. The OWR pin no longer has an entry in the configuration table because the only mux option it support is OWR, that feature isn't supported, and hence can't conflict with any other pin. This pin can only usefully be used as a GPIO. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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2 changed files with 14 additions and 1 deletions
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@ -31,6 +31,9 @@ void pinmux_init(void)
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pinmux_config_drvgrp_table(jetson_tk1_drvgrps,
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pinmux_config_drvgrp_table(jetson_tk1_drvgrps,
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ARRAY_SIZE(jetson_tk1_drvgrps));
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ARRAY_SIZE(jetson_tk1_drvgrps));
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pinmux_config_mipipadctrlgrp_table(jetson_tk1_mipipadctrlgrps,
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ARRAY_SIZE(jetson_tk1_mipipadctrlgrps));
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}
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}
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#ifdef CONFIG_PCI_TEGRA
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#ifdef CONFIG_PCI_TEGRA
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@ -276,7 +276,6 @@ static const struct pmux_pingrp_config jetson_tk1_pingrps[] = {
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PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(PWR_INT_N, PMI, UP, TRISTATE, INPUT, DEFAULT, DEFAULT),
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PINCFG(PWR_INT_N, PMI, UP, TRISTATE, INPUT, DEFAULT, DEFAULT),
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PINCFG(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
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PINCFG(OWR, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, NORMAL),
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PINCFG(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
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PINCFG(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
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PINCFG(JTAG_RTCK, RTCK, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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PINCFG(JTAG_RTCK, RTCK, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT),
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};
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};
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@ -296,4 +295,15 @@ static const struct pmux_pingrp_config jetson_tk1_pingrps[] = {
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static const struct pmux_drvgrp_config jetson_tk1_drvgrps[] = {
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static const struct pmux_drvgrp_config jetson_tk1_drvgrps[] = {
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};
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};
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#define MIPIPADCTRLCFG(_grp, _mux) \
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{ \
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.grp = PMUX_MIPIPADCTRLGRP_##_grp, \
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.func = PMUX_FUNC_##_mux, \
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}
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static const struct pmux_mipipadctrlgrp_config jetson_tk1_mipipadctrlgrps[] = {
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/* grp, mux */
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MIPIPADCTRLCFG(DSI_B, DSI_B),
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};
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#endif /* PINMUX_CONFIG_JETSON_TK1_H */
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#endif /* PINMUX_CONFIG_JETSON_TK1_H */
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