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ARM: k2g: Add pll data
Add pll data for k2g Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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6 changed files with 95 additions and 0 deletions
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@ -31,6 +31,7 @@ const struct keystone_pll_regs keystone_pll_regs[] = {
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[TETRIS_PLL] = {KS2_ARMPLLCTL0, KS2_ARMPLLCTL1},
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[DDR3A_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
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[DDR3B_PLL] = {KS2_DDR3BPLLCTL0, KS2_DDR3BPLLCTL1},
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[UART_PLL] = {KS2_UARTPLLCTL0, KS2_UARTPLLCTL1},
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};
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inline void pll_pa_clk_sel(void)
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@ -313,6 +314,10 @@ static unsigned long pll_freq_get(int pll)
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ret = external_clk[ddr3b_clk];
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reg = KS2_DDR3BPLLCTL0;
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break;
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case UART_PLL:
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ret = external_clk[uart_clk];
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reg = KS2_UARTPLLCTL0;
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break;
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default:
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return 0;
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}
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18
arch/arm/mach-keystone/include/mach/clock-k2g.h
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18
arch/arm/mach-keystone/include/mach/clock-k2g.h
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@ -0,0 +1,18 @@
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/*
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* K2G: Clock data
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*
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* (C) Copyright 2015
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* Texas Instruments Incorporated, <www.ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARCH_CLOCK_K2G_H
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#define __ASM_ARCH_CLOCK_K2G_H
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#define PLLSET_CMD_LIST "<pa|arm|ddr3>"
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#define DEV_SUPPORTED_SPEEDS 0xfff
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#define ARM_SUPPORTED_SPEEDS 0xfff
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#endif
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@ -24,8 +24,13 @@
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#include <asm/arch/clock-k2l.h>
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#endif
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#ifdef CONFIG_SOC_K2G
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#include <asm/arch/clock-k2g.h>
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#endif
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#define CORE_PLL MAIN_PLL
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#define DDR3_PLL DDR3A_PLL
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#define NSS_PLL PASS_PLL
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#define CLK_LIST(CLK)\
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CLK(0, core_pll_clk)\
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@ -75,6 +80,7 @@ enum {
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PASS_PLL,
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DDR3A_PLL,
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DDR3B_PLL,
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UART_PLL,
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MAX_PLL_COUNT,
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};
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@ -167,6 +167,8 @@ typedef volatile unsigned int *dv_reg_p;
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#define KS2_DDR3BPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x36C)
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#define KS2_ARMPLLCTL0 (KS2_DEVICE_STATE_CTRL_BASE + 0x370)
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#define KS2_ARMPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x374)
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#define KS2_UARTPLLCTL0 (KS2_DEVICE_STATE_CTRL_BASE + 0x390)
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#define KS2_UARTPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x394)
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#define KS2_PLL_CNTRL_BASE 0x02310000
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#define KS2_CLOCK_BASE KS2_PLL_CNTRL_BASE
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@ -13,3 +13,4 @@ obj-$(CONFIG_K2E_EVM) += board_k2e.o
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obj-$(CONFIG_K2E_EVM) += ddr3_k2e.o
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obj-$(CONFIG_K2L_EVM) += board_k2l.o
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obj-$(CONFIG_K2L_EVM) += ddr3_k2l.o
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obj-$(CONFIG_K2G_EVM) += board_k2g.o
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63
board/ti/ks2_evm/board_k2g.c
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63
board/ti/ks2_evm/board_k2g.c
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@ -0,0 +1,63 @@
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/*
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* K2G EVM : Board initialization
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*
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* (C) Copyright 2015
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* Texas Instruments Incorporated, <www.ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/clock.h>
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static struct pll_init_data main_pll_config = {MAIN_PLL, 100, 1, 4};
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static struct pll_init_data tetris_pll_config = {TETRIS_PLL, 100, 1, 4};
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static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
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static struct pll_init_data nss_pll_config = {NSS_PLL, 250, 3, 2};
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static struct pll_init_data ddr3_pll_config = {DDR3_PLL, 250, 3, 10};
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struct pll_init_data *get_pll_init_data(int pll)
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{
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struct pll_init_data *data = NULL;
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switch (pll) {
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case MAIN_PLL:
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data = &main_pll_config;
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break;
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case TETRIS_PLL:
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data = &tetris_pll_config[speed];
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break;
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case NSS_PLL:
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data = &nss_pll_config;
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break;
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case UART_PLL:
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data = &uart_pll_config;
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break;
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case DDR3_PLL:
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data = &ddr_pll_config;
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break;
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default:
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data = NULL;
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}
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return data;
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}
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s16 divn_val[16] = {
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
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};
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#ifdef CONFIG_BOARD_EARLY_INIT_F
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int board_early_init_f(void)
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{
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init_plls();
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return 0;
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}
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#endif
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#ifdef CONFIG_SPL_BUILD
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void spl_init_keystone_plls(void)
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{
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init_plls();
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}
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#endif
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