mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-20 22:21:41 +00:00
ARM: remove broken "impa7" board.
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Marius Gröger <mag@sysgo.de>
This commit is contained in:
Wolfgang Denk
parent
2c650e2010
commit
c1f8750f9f
14 changed files with 6 additions and 878 deletions
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@ -657,10 +657,6 @@ Simon Guinot <simon.guinot@sequanux.org>
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netspace_v2 ARM926EJS (Kirkwood SoC)
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netspace_v2 ARM926EJS (Kirkwood SoC)
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netspace_max_v2 ARM926EJS (Kirkwood SoC)
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netspace_max_v2 ARM926EJS (Kirkwood SoC)
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Marius Gröger <mag@sysgo.de>
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impa7 ARM720T (EP7211)
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Igor Grinberg <grinberg@compulab.co.il>
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Igor Grinberg <grinberg@compulab.co.il>
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cm-t35 ARM ARMV7 (OMAP3xx Soc)
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cm-t35 ARM ARMV7 (OMAP3xx Soc)
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1
MAKEALL
1
MAKEALL
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@ -301,7 +301,6 @@ LIST_SA="$(boards_by_cpu sa1100)"
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#########################################################################
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#########################################################################
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LIST_ARM7=" \
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LIST_ARM7=" \
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impa7 \
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lpc2292sodimm \
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lpc2292sodimm \
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modnet50 \
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modnet50 \
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"
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"
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@ -36,10 +36,6 @@
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#include <asm/hardware.h>
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#include <asm/hardware.h>
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#include <asm/system.h>
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#include <asm/system.h>
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#if defined(CONFIG_IMPA7)
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static void cache_flush(void);
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#endif
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int cleanup_before_linux (void)
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int cleanup_before_linux (void)
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{
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{
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/*
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/*
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@ -50,20 +46,7 @@ int cleanup_before_linux (void)
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* and we set the CPU-speed to 73 MHz - see start.S for details
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* and we set the CPU-speed to 73 MHz - see start.S for details
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*/
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*/
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#if defined(CONFIG_IMPA7)
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#if defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
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disable_interrupts ();
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/* turn off I-cache */
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icache_disable();
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dcache_disable();
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/* flush I-cache */
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cache_flush();
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#ifdef CONFIG_ARM7_REVD
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/* go to high speed */
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IO_SYSCON3 = (IO_SYSCON3 & ~CLKCTL) | CLKCTL_73;
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#endif
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#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B) || defined(CONFIG_LPC2292)
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disable_interrupts ();
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disable_interrupts ();
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/* Nothing more needed */
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/* Nothing more needed */
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#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
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#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
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@ -73,13 +56,3 @@ int cleanup_before_linux (void)
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#endif
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#endif
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return 0;
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return 0;
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}
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}
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#if defined(CONFIG_IMPA7)
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/* flush I/D-cache */
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static void cache_flush (void)
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{
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unsigned long i = 0;
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asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
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}
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#endif
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@ -149,18 +149,6 @@ int timer_init (void)
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/* set timer 2 counter */
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/* set timer 2 counter */
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lastdec = TIMER_LOAD_VAL;
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lastdec = TIMER_LOAD_VAL;
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#elif defined(CONFIG_IMPA7)
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/* disable all interrupts */
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IO_INTMR1 = 0;
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/* operate timer 1 in prescale mode */
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IO_SYSCON1 |= SYSCON1_TC1M;
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/* select 2kHz clock source for timer 1 */
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IO_SYSCON1 &= ~SYSCON1_TC1S;
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/* set timer 1 counter */
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lastdec = IO_TC1D = TIMER_LOAD_VAL;
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#elif defined(CONFIG_S3C4510B)
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#elif defined(CONFIG_S3C4510B)
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/* configure free running timer 0 */
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/* configure free running timer 0 */
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PUT_REG( REG_TMOD, 0x0);
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PUT_REG( REG_TMOD, 0x0);
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@ -207,7 +195,7 @@ int timer_init (void)
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*/
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*/
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#if defined(CONFIG_IMPA7) || defined(CONFIG_NETARM) || defined(CONFIG_LPC2292)
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#if defined(CONFIG_NETARM) || defined(CONFIG_LPC2292)
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ulong get_timer (ulong base)
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ulong get_timer (ulong base)
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{
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{
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@ -272,25 +272,7 @@ _dynsym_start_ofs:
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*************************************************************************
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*************************************************************************
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*/
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*/
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#if defined(CONFIG_IMPA7)
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#if defined(CONFIG_LPC2292)
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/* Interrupt-Controller base addresses */
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INTMR1: .word 0x80000280 @ 32 bit size
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INTMR2: .word 0x80001280 @ 16 bit size
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INTMR3: .word 0x80002280 @ 8 bit size
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/* SYSCONs */
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SYSCON1: .word 0x80000100
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SYSCON2: .word 0x80001100
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SYSCON3: .word 0x80002200
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#define CLKCTL 0x6 /* mask */
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#define CLKCTL_18 0x0 /* 18.432 MHz */
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#define CLKCTL_36 0x2 /* 36.864 MHz */
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#define CLKCTL_49 0x4 /* 49.152 MHz */
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#define CLKCTL_73 0x6 /* 73.728 MHz */
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#elif defined(CONFIG_LPC2292)
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PLLCFG_ADR: .word PLLCFG
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PLLCFG_ADR: .word PLLCFG
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PLLFEED_ADR: .word PLLFEED
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PLLFEED_ADR: .word PLLFEED
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PLLCON_ADR: .word PLLCON
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PLLCON_ADR: .word PLLCON
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@ -301,35 +283,7 @@ MEMMAP_ADR: .word MEMMAP
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#endif
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#endif
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cpu_init_crit:
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cpu_init_crit:
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#if defined(CONFIG_IMPA7)
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#if defined(CONFIG_NETARM)
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/*
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* mask all IRQs by clearing all bits in the INTMRs
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*/
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mov r1, #0x00
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ldr r0, INTMR1
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str r1, [r0]
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ldr r0, INTMR2
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str r1, [r0]
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ldr r0, INTMR3
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str r1, [r0]
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/*
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* flush v4 I/D caches
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*/
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mov r0, #0
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mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
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mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
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/*
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* disable MMU stuff and caches
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*/
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mrc p15,0,r0,c1,c0
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bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
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bic r0, r0, #0x0000008f @ clear bits 7, 3:0 (B--- WCAM)
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orr r0, r0, #0x00000002 @ set bit 2 (A) Align
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mcr p15,0,r0,c1,c0
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#elif defined(CONFIG_NETARM)
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/*
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/*
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* prior to software reset : need to set pin PORTC4 to be *HRESET
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* prior to software reset : need to set pin PORTC4 to be *HRESET
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*/
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*/
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@ -634,19 +588,7 @@ fiq:
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#endif
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#endif
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#if defined(CONFIG_IMPA7)
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#if defined(CONFIG_NETARM)
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.align 5
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.globl reset_cpu
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reset_cpu:
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mov ip, #0
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mcr p15, 0, ip, c7, c7, 0 @ invalidate cache
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mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4)
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mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
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bic ip, ip, #0x000f @ ............wcam
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bic ip, ip, #0x2100 @ ..v....s........
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mcr p15, 0, ip, c1, c0, 0 @ ctrl register
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mov pc, r0
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#elif defined(CONFIG_NETARM)
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.align 5
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.align 5
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.globl reset_cpu
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.globl reset_cpu
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reset_cpu:
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reset_cpu:
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@ -26,8 +26,6 @@
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#if defined(CONFIG_NETARM)
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#if defined(CONFIG_NETARM)
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#include <asm/arch-arm720t/netarm_registers.h>
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#include <asm/arch-arm720t/netarm_registers.h>
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#elif defined(CONFIG_IMPA7)
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/* include IMPA7 specific hardware file if there was one */
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#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
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#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
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/* include IntegratorCP/CM720T specific hardware file if there was one */
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/* include IntegratorCP/CM720T specific hardware file if there was one */
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#else
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#else
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@ -1,51 +0,0 @@
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#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS := impa7.o flash.o
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SOBJS := lowlevel_init.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,28 +0,0 @@
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#
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# (C) Copyright 2000
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# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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# Marius Groeger <mgroeger@sysgo.de>
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#
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# (C) Copyright 2000
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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||||||
# GNU General Public License for more details.
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||||||
#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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CONFIG_SYS_TEXT_BASE = 0xc1780000
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@ -1,359 +0,0 @@
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/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
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|
||||||
*
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* This program is distributed in the hope that it will be useful,
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|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
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|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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|
||||||
* GNU General Public License for more details.
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|
||||||
*
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|
||||||
* You should have received a copy of the GNU General Public License
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|
||||||
* along with this program; if not, write to the Free Software
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|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#define FLASH_BANK_SIZE 0x800000
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#define MAIN_SECT_SIZE 0x20000
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#define PARAM_SECT_SIZE 0x4000
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
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/*-----------------------------------------------------------------------
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*/
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ulong flash_init (void)
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{
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int i, j;
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ulong size = 0;
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||||||
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
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ulong flashbase = 0;
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flash_info[i].flash_id =
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(INTEL_MANUFACT & FLASH_VENDMASK) |
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(INTEL_ID_28F320B3T & FLASH_TYPEMASK);
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flash_info[i].size = FLASH_BANK_SIZE;
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flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
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memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
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if (i == 0)
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flashbase = PHYS_FLASH_1;
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else if (i == 1)
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flashbase = PHYS_FLASH_2;
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else
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panic ("configured too many flash banks!\n");
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||||||
for (j = 0; j < flash_info[i].sector_count; j++) {
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||||||
if (j <= 7) {
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||||||
flash_info[i].start[j] =
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||||||
flashbase + j * PARAM_SECT_SIZE;
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||||||
} else {
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flash_info[i].start[j] =
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||||||
flashbase + (j - 7) * MAIN_SECT_SIZE;
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||||||
}
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||||||
}
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||||||
size += flash_info[i].size;
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||||||
}
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||||||
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||||||
/* Protect monitor and environment sectors
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||||||
*/
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||||||
flash_protect (FLAG_PROTECT_SET,
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CONFIG_SYS_FLASH_BASE,
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CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
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&flash_info[0]);
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||||||
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flash_protect (FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
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return size;
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}
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|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
*/
|
|
||||||
void flash_print_info (flash_info_t * info)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
|
|
||||||
switch (info->flash_id & FLASH_VENDMASK) {
|
|
||||||
case (INTEL_MANUFACT & FLASH_VENDMASK):
|
|
||||||
printf ("Intel: ");
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
printf ("Unknown Vendor ");
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
switch (info->flash_id & FLASH_TYPEMASK) {
|
|
||||||
case (INTEL_ID_28F320B3T & FLASH_TYPEMASK):
|
|
||||||
printf ("28F320F3B (16Mbit)\n");
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
printf ("Unknown Chip Type\n");
|
|
||||||
goto Done;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
printf (" Size: %ld MB in %d Sectors\n",
|
|
||||||
info->size >> 20, info->sector_count);
|
|
||||||
|
|
||||||
printf (" Sector Start Addresses:");
|
|
||||||
for (i = 0; i < info->sector_count; i++) {
|
|
||||||
if ((i % 5) == 0) {
|
|
||||||
printf ("\n ");
|
|
||||||
}
|
|
||||||
printf (" %08lX%s", info->start[i],
|
|
||||||
info->protect[i] ? " (RO)" : " ");
|
|
||||||
}
|
|
||||||
printf ("\n");
|
|
||||||
|
|
||||||
Done:;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
*/
|
|
||||||
|
|
||||||
int flash_erase (flash_info_t * info, int s_first, int s_last)
|
|
||||||
{
|
|
||||||
int flag, prot, sect;
|
|
||||||
int rc = ERR_OK;
|
|
||||||
ulong start;
|
|
||||||
|
|
||||||
if (info->flash_id == FLASH_UNKNOWN)
|
|
||||||
return ERR_UNKNOWN_FLASH_TYPE;
|
|
||||||
|
|
||||||
if ((s_first < 0) || (s_first > s_last)) {
|
|
||||||
return ERR_INVAL;
|
|
||||||
}
|
|
||||||
|
|
||||||
if ((info->flash_id & FLASH_VENDMASK) !=
|
|
||||||
(INTEL_MANUFACT & FLASH_VENDMASK)) {
|
|
||||||
return ERR_UNKNOWN_FLASH_VENDOR;
|
|
||||||
}
|
|
||||||
|
|
||||||
prot = 0;
|
|
||||||
for (sect = s_first; sect <= s_last; ++sect) {
|
|
||||||
if (info->protect[sect]) {
|
|
||||||
prot++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (prot)
|
|
||||||
return ERR_PROTECTED;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Disable interrupts which might cause a timeout
|
|
||||||
* here. Remember that our exception vectors are
|
|
||||||
* at address 0 in the flash, and we don't want a
|
|
||||||
* (ticker) exception to happen while the flash
|
|
||||||
* chip is in programming mode.
|
|
||||||
*/
|
|
||||||
flag = disable_interrupts ();
|
|
||||||
|
|
||||||
/* Start erase on unprotected sectors */
|
|
||||||
for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
|
|
||||||
|
|
||||||
printf ("Erasing sector %2d ... ", sect);
|
|
||||||
|
|
||||||
/* arm simple, non interrupt dependent timer */
|
|
||||||
start = get_timer(0);
|
|
||||||
|
|
||||||
if (info->protect[sect] == 0) { /* not protected */
|
|
||||||
vu_long *addr = (vu_long *) (info->start[sect]);
|
|
||||||
|
|
||||||
*addr = 0x00200020; /* erase setup */
|
|
||||||
*addr = 0x00D000D0; /* erase confirm */
|
|
||||||
|
|
||||||
while ((*addr & 0x00800080) != 0x00800080) {
|
|
||||||
if (get_timer(start) >
|
|
||||||
CONFIG_SYS_FLASH_ERASE_TOUT) {
|
|
||||||
*addr = 0x00B000B0; /* suspend erase */
|
|
||||||
*addr = 0x00FF00FF; /* reset to read mode */
|
|
||||||
rc = ERR_TIMOUT;
|
|
||||||
goto outahere;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
*addr = 0x00FF00FF; /* reset to read mode */
|
|
||||||
}
|
|
||||||
printf ("ok.\n");
|
|
||||||
}
|
|
||||||
if (ctrlc ())
|
|
||||||
printf ("User Interrupt!\n");
|
|
||||||
|
|
||||||
outahere:
|
|
||||||
|
|
||||||
/* allow flash to settle - wait 10 ms */
|
|
||||||
udelay_masked (10000);
|
|
||||||
|
|
||||||
if (flag)
|
|
||||||
enable_interrupts ();
|
|
||||||
|
|
||||||
return rc;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Copy memory to flash
|
|
||||||
*/
|
|
||||||
|
|
||||||
static int write_word (flash_info_t * info, ulong dest, ulong data)
|
|
||||||
{
|
|
||||||
vu_long *addr = (vu_long *) dest;
|
|
||||||
ulong barf;
|
|
||||||
int rc = ERR_OK;
|
|
||||||
int flag;
|
|
||||||
ulong start;
|
|
||||||
|
|
||||||
/* Check if Flash is (sufficiently) erased
|
|
||||||
*/
|
|
||||||
if ((*addr & data) != data)
|
|
||||||
return ERR_NOT_ERASED;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Disable interrupts which might cause a timeout
|
|
||||||
* here. Remember that our exception vectors are
|
|
||||||
* at address 0 in the flash, and we don't want a
|
|
||||||
* (ticker) exception to happen while the flash
|
|
||||||
* chip is in programming mode.
|
|
||||||
*/
|
|
||||||
flag = disable_interrupts ();
|
|
||||||
|
|
||||||
/* clear status register command */
|
|
||||||
*addr = 0x00500050;
|
|
||||||
|
|
||||||
/* program set-up command */
|
|
||||||
*addr = 0x00400040;
|
|
||||||
|
|
||||||
/* latch address/data */
|
|
||||||
*addr = data;
|
|
||||||
|
|
||||||
/* arm simple, non interrupt dependent timer */
|
|
||||||
start = get_timer(0);
|
|
||||||
|
|
||||||
/* read status register command */
|
|
||||||
*addr = 0x00700070;
|
|
||||||
|
|
||||||
/* wait while polling the status register */
|
|
||||||
while ((*addr & 0x00800080) != 0x00800080) {
|
|
||||||
if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
|
|
||||||
rc = ERR_TIMOUT;
|
|
||||||
/* suspend program command */
|
|
||||||
*addr = 0x00B000B0;
|
|
||||||
goto outahere;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (*addr & 0x003A003A) { /* check for error */
|
|
||||||
barf = *addr;
|
|
||||||
if (barf & 0x003A0000) {
|
|
||||||
barf >>= 16;
|
|
||||||
} else {
|
|
||||||
barf &= 0x0000003A;
|
|
||||||
}
|
|
||||||
printf ("\nFlash write error %02lx at address %08lx\n", barf, (unsigned long) dest);
|
|
||||||
if (barf & 0x0002) {
|
|
||||||
printf ("Block locked, not erased.\n");
|
|
||||||
rc = ERR_NOT_ERASED;
|
|
||||||
goto outahere;
|
|
||||||
}
|
|
||||||
if (barf & 0x0010) {
|
|
||||||
printf ("Programming error.\n");
|
|
||||||
rc = ERR_PROG_ERROR;
|
|
||||||
goto outahere;
|
|
||||||
}
|
|
||||||
if (barf & 0x0008) {
|
|
||||||
printf ("Vpp Low error.\n");
|
|
||||||
rc = ERR_PROG_ERROR;
|
|
||||||
goto outahere;
|
|
||||||
}
|
|
||||||
rc = ERR_PROG_ERROR;
|
|
||||||
goto outahere;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
outahere:
|
|
||||||
/* read array command */
|
|
||||||
*addr = 0x00FF00FF;
|
|
||||||
|
|
||||||
if (flag)
|
|
||||||
enable_interrupts ();
|
|
||||||
|
|
||||||
return rc;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Copy memory to flash.
|
|
||||||
*/
|
|
||||||
|
|
||||||
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
|
|
||||||
{
|
|
||||||
ulong cp, wp, data;
|
|
||||||
int l;
|
|
||||||
int i, rc;
|
|
||||||
|
|
||||||
wp = (addr & ~3); /* get lower word aligned address */
|
|
||||||
|
|
||||||
/*
|
|
||||||
* handle unaligned start bytes
|
|
||||||
*/
|
|
||||||
if ((l = addr - wp) != 0) {
|
|
||||||
data = 0;
|
|
||||||
for (i = 0, cp = wp; i < l; ++i, ++cp) {
|
|
||||||
data = (data >> 8) | (*(uchar *) cp << 24);
|
|
||||||
}
|
|
||||||
for (; i < 4 && cnt > 0; ++i) {
|
|
||||||
data = (data >> 8) | (*src++ << 24);
|
|
||||||
--cnt;
|
|
||||||
++cp;
|
|
||||||
}
|
|
||||||
for (; cnt == 0 && i < 4; ++i, ++cp) {
|
|
||||||
data = (data >> 8) | (*(uchar *) cp << 24);
|
|
||||||
}
|
|
||||||
|
|
||||||
if ((rc = write_word (info, wp, data)) != 0) {
|
|
||||||
return (rc);
|
|
||||||
}
|
|
||||||
wp += 4;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* handle word aligned part
|
|
||||||
*/
|
|
||||||
while (cnt >= 4) {
|
|
||||||
data = *((vu_long *) src);
|
|
||||||
if ((rc = write_word (info, wp, data)) != 0) {
|
|
||||||
return (rc);
|
|
||||||
}
|
|
||||||
src += 4;
|
|
||||||
wp += 4;
|
|
||||||
cnt -= 4;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (cnt == 0) {
|
|
||||||
return ERR_OK;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* handle unaligned tail bytes
|
|
||||||
*/
|
|
||||||
data = 0;
|
|
||||||
for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
|
|
||||||
data = (data >> 8) | (*src++ << 24);
|
|
||||||
--cnt;
|
|
||||||
}
|
|
||||||
for (; i < 4; ++i, ++cp) {
|
|
||||||
data = (data >> 8) | (*(uchar *) cp << 24);
|
|
||||||
}
|
|
||||||
|
|
||||||
return write_word (info, wp, data);
|
|
||||||
}
|
|
||||||
|
|
@ -1,71 +0,0 @@
|
||||||
/*
|
|
||||||
* (C) Copyright 2002
|
|
||||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
|
||||||
* Marius Groeger <mgroeger@sysgo.de>
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <common.h>
|
|
||||||
#include <netdev.h>
|
|
||||||
#include <clps7111.h>
|
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
|
|
||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Miscelaneous platform dependent initialisations
|
|
||||||
*/
|
|
||||||
|
|
||||||
int board_init (void)
|
|
||||||
{
|
|
||||||
/* Activate LED flasher */
|
|
||||||
IO_LEDFLSH = 0x40;
|
|
||||||
|
|
||||||
/* arch number of EP7111 */
|
|
||||||
gd->bd->bi_arch_number = MACH_TYPE_EDB7211;
|
|
||||||
|
|
||||||
/* location of boot parameters for EP7111 */
|
|
||||||
gd->bd->bi_boot_params = 0xc0020100;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
int dram_init (void)
|
|
||||||
{
|
|
||||||
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
|
|
||||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
|
|
||||||
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
|
|
||||||
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
|
|
||||||
|
|
||||||
return (0);
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef CONFIG_CMD_NET
|
|
||||||
int board_eth_init(bd_t *bis)
|
|
||||||
{
|
|
||||||
int rc = 0;
|
|
||||||
#ifdef CONFIG_CS8900
|
|
||||||
rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
|
|
||||||
#endif
|
|
||||||
return rc;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
@ -1,85 +0,0 @@
|
||||||
/*
|
|
||||||
* Memory Setup stuff - taken from ???
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include <config.h>
|
|
||||||
#include <version.h>
|
|
||||||
|
|
||||||
|
|
||||||
/* some parameters for the board */
|
|
||||||
|
|
||||||
SYSCON2: .long 0x80001100
|
|
||||||
MEMCFG1: .long 0x80000180
|
|
||||||
MEMCFG2: .long 0x800001C0
|
|
||||||
DRFPR: .long 0x80000200
|
|
||||||
|
|
||||||
syscon2_mask: .long 0x00000004
|
|
||||||
memcfg1_val: .long 0x160c1414
|
|
||||||
memcfg2_mask: .long 0x0000ffff @ only set lower 16 bits
|
|
||||||
memcfg2_val: .long 0x00000000 @ upper 16 bits are reserved for CS7 + CS6
|
|
||||||
drfpr_val: .long 0x00000081
|
|
||||||
/* setting up the memory */
|
|
||||||
|
|
||||||
.globl lowlevel_init
|
|
||||||
lowlevel_init:
|
|
||||||
/*
|
|
||||||
* DRFPR
|
|
||||||
* 64kHz DRAM refresh
|
|
||||||
*/
|
|
||||||
ldr r0, DRFPR
|
|
||||||
ldr r1, drfpr_val
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
/*
|
|
||||||
* SYSCON2: clear bit 2, DRAM is 32 bits wide
|
|
||||||
*/
|
|
||||||
ldr r0, SYSCON2
|
|
||||||
ldr r2, [r0]
|
|
||||||
ldr r1, syscon2_mask
|
|
||||||
bic r2, r2, r1
|
|
||||||
str r2, [r0]
|
|
||||||
|
|
||||||
/*
|
|
||||||
* MEMCFG1
|
|
||||||
* Setting up Keyboard at CS3, 8 Bit, 3 Waitstates
|
|
||||||
* Setting up CS8900 (Ethernet) at CS2, 32 Bit, 5 Waitstates
|
|
||||||
* Setting up flash at CS0 and CS1, 32 Bit, 3 Waitstates
|
|
||||||
*/
|
|
||||||
ldr r0, MEMCFG1
|
|
||||||
ldr r1, memcfg1_val
|
|
||||||
str r1, [r0]
|
|
||||||
|
|
||||||
/*
|
|
||||||
* MEMCFG2
|
|
||||||
* Setting up ? with 0
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
ldr r0, MEMCFG2
|
|
||||||
ldr r2, [r0]
|
|
||||||
ldr r1, memcfg2_mask
|
|
||||||
bic r2, r2, r1
|
|
||||||
ldr r1, memcfg2_val
|
|
||||||
orr r2, r2, r1
|
|
||||||
str r2, [r0]
|
|
||||||
|
|
||||||
/* everything is fine now */
|
|
||||||
mov pc, lr
|
|
||||||
|
|
@ -42,7 +42,6 @@ imx31_litekit arm arm1136 - logicpd
|
||||||
mx35pdk arm arm1136 - freescale mx35
|
mx35pdk arm arm1136 - freescale mx35
|
||||||
omap2420h4 arm arm1136 - ti omap24xx
|
omap2420h4 arm arm1136 - ti omap24xx
|
||||||
tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x
|
tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x
|
||||||
impa7 arm arm720t
|
|
||||||
modnet50 arm arm720t
|
modnet50 arm arm720t
|
||||||
integratorap_cm720t arm arm720t integrator armltd - integratorap
|
integratorap_cm720t arm arm720t integrator armltd - integratorap
|
||||||
lpc2292sodimm arm arm720t - - lpc2292
|
lpc2292sodimm arm arm720t - - lpc2292
|
||||||
|
|
|
||||||
|
|
@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
|
||||||
|
|
||||||
Board Arch CPU removed Commit last known maintainer/contact
|
Board Arch CPU removed Commit last known maintainer/contact
|
||||||
=============================================================================
|
=============================================================================
|
||||||
|
impa7 arm arm720t - 2011-09-05 Marius Gröger <mag@sysgo.de>
|
||||||
gcplus arm sa1100 - 2011-09-05 George G. Davis <gdavis@mvista.com>
|
gcplus arm sa1100 - 2011-09-05 George G. Davis <gdavis@mvista.com>
|
||||||
evb4510 arm arm720t - 2011-09-05 Curt Brune <curt@cucy.com>
|
evb4510 arm arm720t - 2011-09-05 Curt Brune <curt@cucy.com>
|
||||||
ep7312 arm arm720t - 2011-09-05 Marius Gröger <mag@sysgo.de>
|
ep7312 arm arm720t - 2011-09-05 Marius Gröger <mag@sysgo.de>
|
||||||
|
|
|
||||||
|
|
@ -1,174 +0,0 @@
|
||||||
/*
|
|
||||||
* (C) Copyright 2000
|
|
||||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
|
||||||
* Marius Groeger <mgroeger@sysgo.de>
|
|
||||||
*
|
|
||||||
* Configuation settings for the implementa impA7 board.
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of
|
|
||||||
* the License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef __CONFIG_H
|
|
||||||
#define __CONFIG_H
|
|
||||||
|
|
||||||
/*
|
|
||||||
* High Level Configuration Options
|
|
||||||
* (easy to change)
|
|
||||||
*/
|
|
||||||
#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
|
|
||||||
#define CONFIG_IMPA7 1 /* on an impA7 Board */
|
|
||||||
#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
|
|
||||||
#define CONFIG_ARM7_REVD 1 /* enable ARM720 REV.D Workarounds */
|
|
||||||
|
|
||||||
#undef CONFIG_USE_IRQ /* don't need them anymore */
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Size of malloc() pool
|
|
||||||
*/
|
|
||||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Hardware drivers
|
|
||||||
*/
|
|
||||||
#define CONFIG_NET_MULTI
|
|
||||||
#define CONFIG_CS8900 /* we have a CS8900 on-board */
|
|
||||||
#define CONFIG_CS8900_BASE 0x20000000
|
|
||||||
#define CONFIG_CS8900_BUS32
|
|
||||||
|
|
||||||
/*
|
|
||||||
* select serial console configuration
|
|
||||||
*/
|
|
||||||
#define CONFIG_CLPS7111_SERIAL
|
|
||||||
#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
|
|
||||||
|
|
||||||
/* allow to overwrite serial and ethaddr */
|
|
||||||
#define CONFIG_ENV_OVERWRITE
|
|
||||||
|
|
||||||
#define CONFIG_BAUDRATE 9600
|
|
||||||
|
|
||||||
/*
|
|
||||||
* BOOTP options
|
|
||||||
*/
|
|
||||||
#define CONFIG_BOOTP_SUBNETMASK
|
|
||||||
#define CONFIG_BOOTP_GATEWAY
|
|
||||||
#define CONFIG_BOOTP_HOSTNAME
|
|
||||||
#define CONFIG_BOOTP_BOOTPATH
|
|
||||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Command line configuration.
|
|
||||||
*/
|
|
||||||
#include <config_cmd_default.h>
|
|
||||||
|
|
||||||
#define CONFIG_CMD_JFFS2
|
|
||||||
|
|
||||||
|
|
||||||
#define CONFIG_BOOTDELAY 3
|
|
||||||
#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600"
|
|
||||||
/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5a */
|
|
||||||
/*#define CONFIG_NETMASK 255.255.0.0 */
|
|
||||||
/*#define CONFIG_IPADDR 172.22.2.128 */
|
|
||||||
/*#define CONFIG_SERVERIP 172.22.2.126 */
|
|
||||||
/*#define CONFIG_BOOTFILE "impa7" */
|
|
||||||
#define CONFIG_BOOTCOMMAND "bootp;bootm"
|
|
||||||
|
|
||||||
#if defined(CONFIG_CMD_KGDB)
|
|
||||||
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
|
|
||||||
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Miscellaneous configurable options
|
|
||||||
*/
|
|
||||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
|
||||||
#define CONFIG_SYS_PROMPT "impA7 # " /* Monitor Command Prompt */
|
|
||||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
|
||||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
|
|
||||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
|
||||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
|
|
||||||
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_LOAD_ADDR 0xc1000000 /* default load address */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */
|
|
||||||
|
|
||||||
/* valid baudrates */
|
|
||||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Stack sizes
|
|
||||||
*
|
|
||||||
* The stack sizes are set up in start.S using the settings below
|
|
||||||
*/
|
|
||||||
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
|
|
||||||
#ifdef CONFIG_USE_IRQ
|
|
||||||
#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
|
|
||||||
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* Physical Memory Map
|
|
||||||
*/
|
|
||||||
#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
|
|
||||||
#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
|
|
||||||
#define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
|
|
||||||
#define PHYS_SDRAM_2 0xc1000000 /* SDRAM Bank #2 */
|
|
||||||
#define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */
|
|
||||||
|
|
||||||
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
|
|
||||||
#define PHYS_FLASH_2 0x10000000 /* Flash Bank #2 */
|
|
||||||
#define PHYS_FLASH_SIZE 0x00800000 /* 16 MB */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
|
|
||||||
|
|
||||||
/*-----------------------------------------------------------------------
|
|
||||||
* FLASH and environment organization
|
|
||||||
*/
|
|
||||||
#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
|
|
||||||
#define CONFIG_SYS_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
|
|
||||||
|
|
||||||
/* timeout values are in ticks */
|
|
||||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
|
|
||||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
|
|
||||||
|
|
||||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
|
||||||
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
|
|
||||||
#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
|
|
||||||
|
|
||||||
/*
|
|
||||||
* JFFS2 partitions
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
/* No command line, one static partition, whole device */
|
|
||||||
#undef CONFIG_CMD_MTDPARTS
|
|
||||||
#define CONFIG_JFFS2_DEV "nor0"
|
|
||||||
#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
|
|
||||||
#define CONFIG_JFFS2_PART_OFFSET 0x00020000
|
|
||||||
|
|
||||||
/* mtdparts command line support */
|
|
||||||
/*
|
|
||||||
#define CONFIG_CMD_MTDPARTS
|
|
||||||
#define MTDIDS_DEFAULT "nor0=impA7 NOR Flash Bank #0,nor1=impA7 NOR Flash Bank #1"
|
|
||||||
#define MTDPARTS_DEFAULT "mtdparts=impA7 NOR Flash Bank #0:-(FileSystem1);impA7 NOR Flash Bank #1:-(FileSystem2)"
|
|
||||||
*/
|
|
||||||
|
|
||||||
#endif /* __CONFIG_H */
|
|
||||||
Loading…
Add table
Reference in a new issue