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Merge branch 'master' of git://git.denx.de/u-boot-arm

Browse source 
* 'master' of git://git.denx.de/u-boot-arm:
  ARM: lib: Remove CONFIG_ARCH_CPU_INIT dependency
  ARM: OMAP4: PANDA: Add rest of the USB module pads to essentials
  arm: armv7: add compile option -mno-unaligned-access if available
  arm: Fix to mistake clean the memory space

Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk 2012-07-20 22:38:32 +02:00
commit c2b3dcc24d
16 changed files with 97 additions and 64 deletions
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8
arch/arm/cpu/arm1136/start.S
View file

@ -251,10 +251,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
#endif /* #ifndef CONFIG_SPL_BUILD */ #endif /* #ifndef CONFIG_SPL_BUILD */
/* /*

9
arch/arm/cpu/arm1176/start.S
View file

@ -351,11 +351,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
#ifndef CONFIG_NAND_SPL #ifndef CONFIG_NAND_SPL
bl coloured_LED_init bl coloured_LED_init
bl red_led_on bl red_led_on

8
arch/arm/cpu/arm720t/start.S
View file

@ -228,10 +228,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
bl coloured_LED_init bl coloured_LED_init
bl red_led_on bl red_led_on

8
arch/arm/cpu/arm920t/start.S
View file

@ -271,10 +271,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
bl coloured_LED_init bl coloured_LED_init
bl red_led_on bl red_led_on

8
arch/arm/cpu/arm925t/start.S
View file

@ -265,10 +265,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
bl coloured_LED_init bl coloured_LED_init
bl red_led_on bl red_led_on

8
arch/arm/cpu/arm946es/start.S
View file

@ -236,10 +236,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
blo clbss_l clbss_e:
#endif #endif
/* /*

8
arch/arm/cpu/arm_intcm/start.S
View file

@ -232,10 +232,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
bl coloured_LED_init bl coloured_LED_init
bl red_led_on bl red_led_on

2
arch/arm/cpu/armv7/config.mk
View file

@ -26,6 +26,8 @@ PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
# supported by more tool-chains # supported by more tool-chains
PF_CPPFLAGS_ARMV7 := $(call cc-option, -march=armv7-a, -march=armv5) PF_CPPFLAGS_ARMV7 := $(call cc-option, -march=armv7-a, -march=armv5)
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV7) PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV7)
PF_CPPFLAGS_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,)
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_NO_UNALIGNED)
# ========================================================================= # =========================================================================
# #

8
arch/arm/cpu/armv7/start.S
View file

@ -259,10 +259,12 @@ clear_bss:
#endif #endif
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
/* /*
* We are done. Do not return, instead branch to second part of board * We are done. Do not return, instead branch to second part of board

8
arch/arm/cpu/ixp/start.S
View file

@ -334,10 +334,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
bl coloured_LED_init bl coloured_LED_init
bl red_led_on bl red_led_on

8
arch/arm/cpu/lh7a40x/start.S
View file

@ -245,10 +245,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
#endif #endif
/* /*

8
arch/arm/cpu/pxa/start.S
View file

@ -258,10 +258,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
#endif /* #ifndef CONFIG_SPL_BUILD */ #endif /* #ifndef CONFIG_SPL_BUILD */
/* /*

8
arch/arm/cpu/s3c44b0/start.S
View file

@ -217,10 +217,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
bl coloured_LED_init bl coloured_LED_init
bl red_led_on bl red_led_on

8
arch/arm/cpu/sa1100/start.S
View file

@ -221,10 +221,12 @@ clear_bss:
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */ clbss_l:cmp r0, r1 /* clear loop... */
bhs clbss_e /* if reached end of bss, exit */
str r2, [r0]
add r0, r0, #4 add r0, r0, #4
cmp r0, r1 b clbss_l
bne clbss_l clbss_e:
#endif #endif
/* /*

10
arch/arm/lib/board.c
View file

@ -224,10 +224,16 @@ void __dram_init_banksize(void)
void dram_init_banksize(void) void dram_init_banksize(void)
__attribute__((weak, alias("__dram_init_banksize"))); __attribute__((weak, alias("__dram_init_banksize")));
int __arch_cpu_init(void)
{
return 0;
}
int arch_cpu_init(void)
__attribute__((weak, alias("__arch_cpu_init")));
init_fnc_t *init_sequence[] = { init_fnc_t *init_sequence[] = {
#if defined(CONFIG_ARCH_CPU_INIT)
arch_cpu_init, /* basic arch cpu dependent setup */ arch_cpu_init, /* basic arch cpu dependent setup */
#endif
#if defined(CONFIG_BOARD_EARLY_INIT_F) #if defined(CONFIG_BOARD_EARLY_INIT_F)
board_early_init_f, board_early_init_f,
#endif #endif

44
board/ti/panda/panda_mux_data.h
View file

@ -62,7 +62,26 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
{UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ {UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */
{UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ {UART3_RTS_SD, (M0)}, /* uart3_rts_sd */
{UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ {UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */
{UART3_TX_IRTX, (M0)} /* uart3_tx */ {UART3_TX_IRTX, (M0)}, /* uart3_tx */
{USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */
{USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */
{USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */
{USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */
{USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */
{USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */
{USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */
{USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */
{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */
{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */
{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */
{USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */
{USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */
{USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */
{USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */
{USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */
{UNIPRO_TY2, (PTU | IEN | M3)}, /* gpio_1 */
{GPMC_WAIT1, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_62 */
{FREF_CLK2_OUT, (PTU | IEN | M3)}, /* gpio_182 */
}; };
@ -70,7 +89,8 @@ const struct pad_conf_entry wkup_padconf_array_essential[] = {
{PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ {PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */
{PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ {PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */
{PAD1_SYS_32K, (IEN | M0)} /* sys_32k */ {PAD1_SYS_32K, (IEN | M0)}, /* sys_32k */
{PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */
}; };
@ -109,7 +129,6 @@ const struct pad_conf_entry core_padconf_array_non_essential[] = {
{GPMC_NBE0_CLE, (M3)}, /* gpio_59 */ {GPMC_NBE0_CLE, (M3)}, /* gpio_59 */
{GPMC_NBE1, (PTD | M3)}, /* gpio_60 */ {GPMC_NBE1, (PTD | M3)}, /* gpio_60 */
{GPMC_WAIT0, (PTU | IEN | M3)}, /* gpio_61 */ {GPMC_WAIT0, (PTU | IEN | M3)}, /* gpio_61 */
{GPMC_WAIT1, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_62 */
{C2C_DATA11, (PTD | M3)}, /* gpio_100 */ {C2C_DATA11, (PTD | M3)}, /* gpio_100 */
{C2C_DATA12, (PTU | IEN | M3)}, /* gpio_101 */ {C2C_DATA12, (PTU | IEN | M3)}, /* gpio_101 */
{C2C_DATA13, (PTD | M3)}, /* gpio_102 */ {C2C_DATA13, (PTD | M3)}, /* gpio_102 */
@ -136,22 +155,6 @@ const struct pad_conf_entry core_padconf_array_non_essential[] = {
{CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_shutter */ {CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_shutter */
{CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_strobe */ {CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_strobe */
{CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_83 */ {CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_83 */
{USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */
{USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)}, /* usbb1_ulpiphy_stp */
{USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dir */
{USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_nxt */
{USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat0 */
{USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat1 */
{USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat2 */
{USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat3 */
{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */
{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */
{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */
{USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */
{USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */
{USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */
{USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */
{USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */
{ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dr */ {ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dr */
{ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dx */ {ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dx */
{ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_fsx */ {ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_fsx */
@ -211,7 +214,6 @@ const struct pad_conf_entry core_padconf_array_non_essential[] = {
{UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col2 */ {UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col2 */
{UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col3 */ {UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col3 */
{UNIPRO_TX2, (PTU | IEN | M3)}, /* gpio_0 */ {UNIPRO_TX2, (PTU | IEN | M3)}, /* gpio_0 */
{UNIPRO_TY2, (PTU | IEN | M3)}, /* gpio_1 */
{UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row0 */ {UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row0 */
{UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row1 */ {UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row1 */
{UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row2 */ {UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row2 */
@ -222,7 +224,6 @@ const struct pad_conf_entry core_padconf_array_non_essential[] = {
{USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */ {USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */
{USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */ {USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */
{FREF_CLK1_OUT, (M0)}, /* fref_clk1_out */ {FREF_CLK1_OUT, (M0)}, /* fref_clk1_out */
{FREF_CLK2_OUT, (PTU | IEN | M3)}, /* gpio_182 */
{SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */ {SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */
{SYS_NIRQ2, (PTU | IEN | M0)}, /* sys_nirq2 */ {SYS_NIRQ2, (PTU | IEN | M0)}, /* sys_nirq2 */
{SYS_BOOT0, (PTU | IEN | M3)}, /* gpio_184 */ {SYS_BOOT0, (PTU | IEN | M3)}, /* gpio_184 */
@ -272,7 +273,6 @@ const struct pad_conf_entry wkup_padconf_array_non_essential[] = {
{PAD1_FREF_CLK_IOREQ, (M0)}, /* fref_clk_ioreq */ {PAD1_FREF_CLK_IOREQ, (M0)}, /* fref_clk_ioreq */
{PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */ {PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */
{PAD1_FREF_CLK3_REQ, M7}, /* safe mode */ {PAD1_FREF_CLK3_REQ, M7}, /* safe mode */
{PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */
{PAD0_FREF_CLK4_OUT, (PTU | M3)}, /* led status_2 */ {PAD0_FREF_CLK4_OUT, (PTU | M3)}, /* led status_2 */
{PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */ {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */
{PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */ {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */