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x86: minnowmax: Remove incorrect pad-offset of several pins

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Remove 'pad-offset' of soc_gpio_s5_0, soc_gpio_s5_1, soc_gpio_s5_2,
pin_usb_host_en0 and pin_usb_host_en1. These offsets are actually
wrong. Correct value should be added by 0x2000, but since they
are supposed to be 'mode-gpio', 'pad-offset' is not needed at all.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2017-05-07 19:52:30 -07:00
parent 770ee01742
commit c2f17939f4
1 changed files with 0 additions and 5 deletions
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5
arch/x86/dts/minnowmax.dts
View file

@ -35,7 +35,6 @@
/* GPIO E0 */ /* GPIO E0 */
soc_gpio_s5_0@0 { soc_gpio_s5_0@0 {
gpio-offset = <0x80 0>; gpio-offset = <0x80 0>;
pad-offset = <0x1d0>;
mode-gpio; mode-gpio;
output-value = <0>; output-value = <0>;
direction = <PIN_OUTPUT>; direction = <PIN_OUTPUT>;
@ -44,7 +43,6 @@
/* GPIO E1 */ /* GPIO E1 */
soc_gpio_s5_1@0 { soc_gpio_s5_1@0 {
gpio-offset = <0x80 1>; gpio-offset = <0x80 1>;
pad-offset = <0x210>;
mode-gpio; mode-gpio;
output-value = <0>; output-value = <0>;
direction = <PIN_OUTPUT>; direction = <PIN_OUTPUT>;
@ -53,7 +51,6 @@
/* GPIO E2 */ /* GPIO E2 */
soc_gpio_s5_2@0 { soc_gpio_s5_2@0 {
gpio-offset = <0x80 2>; gpio-offset = <0x80 2>;
pad-offset = <0x1e0>;
mode-gpio; mode-gpio;
output-value = <0>; output-value = <0>;
direction = <PIN_OUTPUT>; direction = <PIN_OUTPUT>;
@ -61,7 +58,6 @@
pin_usb_host_en0@0 { pin_usb_host_en0@0 {
gpio-offset = <0x80 8>; gpio-offset = <0x80 8>;
pad-offset = <0x260>;
mode-gpio; mode-gpio;
output-value = <1>; output-value = <1>;
direction = <PIN_OUTPUT>; direction = <PIN_OUTPUT>;
@ -69,7 +65,6 @@
pin_usb_host_en1@0 { pin_usb_host_en1@0 {
gpio-offset = <0x80 9>; gpio-offset = <0x80 9>;
pad-offset = <0x250>;
mode-gpio; mode-gpio;
output-value = <1>; output-value = <1>;
direction = <PIN_OUTPUT>; direction = <PIN_OUTPUT>;