GitHub-Mirror/u-boot
2
0
Fork 0
mirror of https://github.com/Fishwaldo/u-boot.git synced 2025-03-28 01:51:33 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

net: pch_gbe: Convert to use DM PCI API

Browse source 
Use native DM PCI APIs instead of legacy compatible ones.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2016-02-02 05:57:59 -08:00
parent 3857ed015f
commit c52ac3f901
2 changed files with 13 additions and 16 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

27
drivers/net/pch_gbe.c
View file

@ -117,15 +117,15 @@ static void pch_gbe_rx_descs_init(struct udevice *dev)
memset(rx_desc, 0, sizeof(struct pch_gbe_rx_desc) * PCH_GBE_DESC_NUM); memset(rx_desc, 0, sizeof(struct pch_gbe_rx_desc) * PCH_GBE_DESC_NUM);
for (i = 0; i < PCH_GBE_DESC_NUM; i++) for (i = 0; i < PCH_GBE_DESC_NUM; i++)
rx_desc->buffer_addr = pci_phys_to_mem(priv->bdf, rx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev,
(u32)(priv->rx_buff[i])); (u32)(priv->rx_buff[i]));
writel(pci_phys_to_mem(priv->bdf, (u32)rx_desc), writel(dm_pci_phys_to_mem(priv->dev, (u32)rx_desc),
&mac_regs->rx_dsc_base); &mac_regs->rx_dsc_base);
writel(sizeof(struct pch_gbe_rx_desc) * (PCH_GBE_DESC_NUM - 1), writel(sizeof(struct pch_gbe_rx_desc) * (PCH_GBE_DESC_NUM - 1),
&mac_regs->rx_dsc_size); &mac_regs->rx_dsc_size);
writel(pci_phys_to_mem(priv->bdf, (u32)(rx_desc + 1)), writel(dm_pci_phys_to_mem(priv->dev, (u32)(rx_desc + 1)),
&mac_regs->rx_dsc_sw_p); &mac_regs->rx_dsc_sw_p);
} }
@ -137,11 +137,11 @@ static void pch_gbe_tx_descs_init(struct udevice *dev)
memset(tx_desc, 0, sizeof(struct pch_gbe_tx_desc) * PCH_GBE_DESC_NUM); memset(tx_desc, 0, sizeof(struct pch_gbe_tx_desc) * PCH_GBE_DESC_NUM);
writel(pci_phys_to_mem(priv->bdf, (u32)tx_desc), writel(dm_pci_phys_to_mem(priv->dev, (u32)tx_desc),
&mac_regs->tx_dsc_base); &mac_regs->tx_dsc_base);
writel(sizeof(struct pch_gbe_tx_desc) * (PCH_GBE_DESC_NUM - 1), writel(sizeof(struct pch_gbe_tx_desc) * (PCH_GBE_DESC_NUM - 1),
&mac_regs->tx_dsc_size); &mac_regs->tx_dsc_size);
writel(pci_phys_to_mem(priv->bdf, (u32)(tx_desc + 1)), writel(dm_pci_phys_to_mem(priv->dev, (u32)(tx_desc + 1)),
&mac_regs->tx_dsc_sw_p); &mac_regs->tx_dsc_sw_p);
} }
@ -251,7 +251,7 @@ static int pch_gbe_send(struct udevice *dev, void *packet, int length)
if (length < 64) if (length < 64)
frame_ctrl |= PCH_GBE_TXD_CTRL_APAD; frame_ctrl |= PCH_GBE_TXD_CTRL_APAD;
tx_desc->buffer_addr = pci_phys_to_mem(priv->bdf, (u32)packet); tx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev, (u32)packet);
tx_desc->length = length; tx_desc->length = length;
tx_desc->tx_words_eob = length + 3; tx_desc->tx_words_eob = length + 3;
tx_desc->tx_frame_ctrl = frame_ctrl; tx_desc->tx_frame_ctrl = frame_ctrl;
@ -262,7 +262,7 @@ static int pch_gbe_send(struct udevice *dev, void *packet, int length)
if (++priv->tx_idx >= PCH_GBE_DESC_NUM) if (++priv->tx_idx >= PCH_GBE_DESC_NUM)
priv->tx_idx = 0; priv->tx_idx = 0;
writel(pci_phys_to_mem(priv->bdf, (u32)(tx_head + priv->tx_idx)), writel(dm_pci_phys_to_mem(priv->dev, (u32)(tx_head + priv->tx_idx)),
&mac_regs->tx_dsc_sw_p); &mac_regs->tx_dsc_sw_p);
start = get_timer(0); start = get_timer(0);
@ -294,7 +294,7 @@ static int pch_gbe_recv(struct udevice *dev, int flags, uchar **packetp)
if ((u32)rx_desc == hw_desc) if ((u32)rx_desc == hw_desc)
return -EAGAIN; return -EAGAIN;
buffer_addr = pci_mem_to_phys(priv->bdf, rx_desc->buffer_addr); buffer_addr = dm_pci_mem_to_phys(priv->dev, rx_desc->buffer_addr);
*packetp = (uchar *)buffer_addr; *packetp = (uchar *)buffer_addr;
length = rx_desc->rx_words_eob - 3 - ETH_FCS_LEN; length = rx_desc->rx_words_eob - 3 - ETH_FCS_LEN;
@ -315,7 +315,7 @@ static int pch_gbe_free_pkt(struct udevice *dev, uchar *packet, int length)
if (++rx_swp >= PCH_GBE_DESC_NUM) if (++rx_swp >= PCH_GBE_DESC_NUM)
rx_swp = 0; rx_swp = 0;
writel(pci_phys_to_mem(priv->bdf, (u32)(rx_head + rx_swp)), writel(dm_pci_phys_to_mem(priv->dev, (u32)(rx_head + rx_swp)),
&mac_regs->rx_dsc_sw_p); &mac_regs->rx_dsc_sw_p);
return 0; return 0;
@ -421,11 +421,8 @@ int pch_gbe_probe(struct udevice *dev)
{ {
struct pch_gbe_priv *priv; struct pch_gbe_priv *priv;
struct eth_pdata *plat = dev_get_platdata(dev); struct eth_pdata *plat = dev_get_platdata(dev);
pci_dev_t devno;
u32 iobase; u32 iobase;
devno = dm_pci_get_bdf(dev);
/* /*
* The priv structure contains the descriptors and frame buffers which * The priv structure contains the descriptors and frame buffers which
* need a strict buswidth alignment (64 bytes). This is guaranteed by * need a strict buswidth alignment (64 bytes). This is guaranteed by
@ -433,11 +430,11 @@ int pch_gbe_probe(struct udevice *dev)
*/ */
priv = dev_get_priv(dev); priv = dev_get_priv(dev);
priv->bdf = devno; priv->dev = dev;
pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase);
iobase &= PCI_BASE_ADDRESS_MEM_MASK; iobase &= PCI_BASE_ADDRESS_MEM_MASK;
iobase = pci_mem_to_phys(devno, iobase); iobase = dm_pci_mem_to_phys(dev, iobase);
plat->iobase = iobase; plat->iobase = iobase;
priv->mac_regs = (struct pch_gbe_regs *)iobase; priv->mac_regs = (struct pch_gbe_regs *)iobase;

2
drivers/net/pch_gbe.h
View file

@ -290,7 +290,7 @@ struct pch_gbe_priv {
struct phy_device *phydev; struct phy_device *phydev;
struct mii_dev *bus; struct mii_dev *bus;
struct pch_gbe_regs *mac_regs; struct pch_gbe_regs *mac_regs;
pci_dev_t bdf; struct udevice *dev;
int rx_idx; int rx_idx;
int tx_idx; int tx_idx;
}; };