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ARM64: zynqmp: Align register description

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Separate register space and put it on more lines.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2016-04-07 15:01:33 +02:00
parent 939cfeafec
commit c588d15444
1 changed files with 5 additions and 2 deletions
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7
arch/arm/dts/zynqmp.dtsi
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@ -648,7 +648,8 @@
interrupts = <0 15 4>;
interrupt-parent = <&gic>;
num-cs = <1>;
reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
reg = <0x0 0xff0f0000 0x1000>,
<0x0 0xc0000000 0x8000000>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&pd_qspi>;
@ -891,7 +892,9 @@
xlnx_dp_sub: dp_sub@fd4aa000 {
compatible = "xlnx,dp-sub";
status = "disabled";
reg = <0x0 0xfd4aa000 0x1000>, <0x0 0xfd4ab000 0x1000>, <0x0 0xfd4ac000 0x1000>;
reg = <0x0 0xfd4aa000 0x1000>,
<0x0 0xfd4ab000 0x1000>,
<0x0 0xfd4ac000 0x1000>;
reg-names = "blend", "av_buf", "aud";
xlnx,output-fmt = "rgb";
xlnx,vid-fmt = "yuyv";