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ppc4xx/NAND: Reduce size of NAND SPL image

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This is needed for the canyonlands_nand build target. Without it
the resulting image won't fit into 4k.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2010-11-23 14:32:48 +01:00 • committed by Wolfgang Denk
parent ee8028b7f1
commit c5d02825ae
1 changed files with 2 additions and 2 deletions
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4
drivers/mtd/nand/ndfc.c
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@ -201,6 +201,8 @@ int board_nand_init(struct nand_chip *nand)
#ifndef CONFIG_NAND_SPL #ifndef CONFIG_NAND_SPL
nand->write_buf = ndfc_write_buf; nand->write_buf = ndfc_write_buf;
nand->verify_buf = ndfc_verify_buf; nand->verify_buf = ndfc_verify_buf;
chip++;
#else #else
/* /*
* Setup EBC (CS0 only right now) * Setup EBC (CS0 only right now)
@ -211,7 +213,5 @@ int board_nand_init(struct nand_chip *nand)
mtebc(PB0AP, CONFIG_SYS_EBC_PB0AP); mtebc(PB0AP, CONFIG_SYS_EBC_PB0AP);
#endif #endif
chip++;
return 0; return 0;
} }