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imx8mp_evk: Remove EQoS PHY reset codes

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Since we uses the DTS and PHY reset gpio in EQoS driver to do the
reset, remove the duplicated codes from board file.

Signed-off-by: Ye Li <ye.li@nxp.com>
This commit is contained in:
Ye Li 2021-08-16 18:44:30 +08:00 • committed by Stefano Babic
parent e1260aef37
commit c852a2bf6f
1 changed files with 0 additions and 19 deletions
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19
board/freescale/imx8mp_evk/imx8mp_evk.c
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@ -54,30 +54,11 @@ static void setup_fec(void)
setbits_le32(&gpr->gpr[1], BIT(22)); setbits_le32(&gpr->gpr[1], BIT(22));
} }
#define EQOS_RST_PAD IMX_GPIO_NR(4, 22)
static iomux_v3_cfg_t const eqos_rst_pads[] = {
MX8MP_PAD_SAI2_RXC__GPIO4_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
static void setup_iomux_eqos(void)
{
imx_iomux_v3_setup_multiple_pads(eqos_rst_pads,
ARRAY_SIZE(eqos_rst_pads));
gpio_request(EQOS_RST_PAD, "eqos_rst");
gpio_direction_output(EQOS_RST_PAD, 0);
mdelay(15);
gpio_direction_output(EQOS_RST_PAD, 1);
mdelay(100);
}
static int setup_eqos(void) static int setup_eqos(void)
{ {
struct iomuxc_gpr_base_regs *gpr = struct iomuxc_gpr_base_regs *gpr =
(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
setup_iomux_eqos();
/* set INTF as RGMII, enable RGMII TXC clock */ /* set INTF as RGMII, enable RGMII TXC clock */
clrsetbits_le32(&gpr->gpr[1], clrsetbits_le32(&gpr->gpr[1],
IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16)); IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16));