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p1010rdb: fix ddr values for p1014rdb (setting bus width to 16bit)
There was an extra 0 in front of the value we were using to mask, remove it to improve the code. Also fix the value written to ddr_sdram_cfg to set the bus width properly to 16 bits Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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1 changed files with 4 additions and 3 deletions
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@ -147,10 +147,11 @@ phys_size_t fixed_sdram(void)
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cpu = gd->cpu;
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/* P1014 and it's derivatives support max 16bit DDR width */
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if (cpu->soc_ver == SVR_P1014) {
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ddr_cfg_regs.ddr_sdram_cfg &= ~SDRAM_CFG_DBW_MASK;
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ddr_cfg_regs.ddr_sdram_cfg |= SDRAM_CFG_16_BE;
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ddr_cfg_regs.cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS >> 1;
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ddr_cfg_regs.ddr_sdram_cfg &= ~0x00180000;
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ddr_cfg_regs.ddr_sdram_cfg |= 0x001080000;
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/* divide SA and EA by two and then mask the rest so we don't
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* write to reserved fields */
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ddr_cfg_regs.cs[0].bnds = (CONFIG_SYS_DDR_CS0_BNDS >> 1) & 0x0fff0fff;
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}
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ddr_size = (phys_size_t) CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
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