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ddr: altera: Clean up rw_mgr_mem_calibrate_lfifo()

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Minor coding style cleanup, add kerneldoc. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut 2015-07-21 06:18:57 +02:00
parent 78cdd7d0c8
commit c984278a66
1 changed files with 27 additions and 22 deletions
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49
drivers/ddr/altera/sequencer.c
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@ -2818,60 +2818,65 @@ static int rw_mgr_mem_calibrate_vfifo_end(const u32 rw_group,
return ret; return ret;
} }
/* Calibrate LFIFO to find smallest read latency */ /**
* rw_mgr_mem_calibrate_lfifo() - Minimize latency
*
* Stage 4: Minimize latency.
*
* This function implements UniPHY calibration Stage 4, as explained in
* detail in Altera EMI_RM 2015.05.04 , "UniPHY Calibration Stages".
* Calibrate LFIFO to find smallest read latency.
*/
static uint32_t rw_mgr_mem_calibrate_lfifo(void) static uint32_t rw_mgr_mem_calibrate_lfifo(void)
{ {
uint32_t found_one; int found_one = 0;
debug("%s:%d\n", __func__, __LINE__); debug("%s:%d\n", __func__, __LINE__);
/* update info for sims */ /* Update info for sims. */
reg_file_set_stage(CAL_STAGE_LFIFO); reg_file_set_stage(CAL_STAGE_LFIFO);
reg_file_set_sub_stage(CAL_SUBSTAGE_READ_LATENCY); reg_file_set_sub_stage(CAL_SUBSTAGE_READ_LATENCY);
/* Load up the patterns used by read calibration for all ranks */ /* Load up the patterns used by read calibration for all ranks */
rw_mgr_mem_calibrate_read_load_patterns(0, 1); rw_mgr_mem_calibrate_read_load_patterns(0, 1);
found_one = 0;
do { do {
writel(gbl->curr_read_lat, &phy_mgr_cfg->phy_rlat); writel(gbl->curr_read_lat, &phy_mgr_cfg->phy_rlat);
debug_cond(DLEVEL == 2, "%s:%d lfifo: read_lat=%u", debug_cond(DLEVEL == 2, "%s:%d lfifo: read_lat=%u",
__func__, __LINE__, gbl->curr_read_lat); __func__, __LINE__, gbl->curr_read_lat);
if (!rw_mgr_mem_calibrate_read_test_all_ranks(0, if (!rw_mgr_mem_calibrate_read_test_all_ranks(0, NUM_READ_TESTS,
NUM_READ_TESTS, PASS_ALL_BITS, 1))
PASS_ALL_BITS,
1)) {
break; break;
}
found_one = 1; found_one = 1;
/* reduce read latency and see if things are working */ /*
/* correctly */ * Reduce read latency and see if things are
* working correctly.
*/
gbl->curr_read_lat--; gbl->curr_read_lat--;
} while (gbl->curr_read_lat > 0); } while (gbl->curr_read_lat > 0);
/* reset the fifos to get pointers to known state */ /* Reset the fifos to get pointers to known state. */
writel(0, &phy_mgr_cmd->fifo_reset); writel(0, &phy_mgr_cmd->fifo_reset);
if (found_one) { if (found_one) {
/* add a fudge factor to the read latency that was determined */ /* Add a fudge factor to the read latency that was determined */
gbl->curr_read_lat += 2; gbl->curr_read_lat += 2;
writel(gbl->curr_read_lat, &phy_mgr_cfg->phy_rlat); writel(gbl->curr_read_lat, &phy_mgr_cfg->phy_rlat);
debug_cond(DLEVEL == 2, "%s:%d lfifo: success: using \ debug_cond(DLEVEL == 2,
read_lat=%u\n", __func__, __LINE__, "%s:%d lfifo: success: using read_lat=%u\n",
gbl->curr_read_lat); __func__, __LINE__, gbl->curr_read_lat);
return 1;
} else { } else {
set_failing_group_stage(0xff, CAL_STAGE_LFIFO, set_failing_group_stage(0xff, CAL_STAGE_LFIFO,
CAL_SUBSTAGE_READ_LATENCY); CAL_SUBSTAGE_READ_LATENCY);
debug_cond(DLEVEL == 2, "%s:%d lfifo: failed at initial \ debug_cond(DLEVEL == 2,
read_lat=%u\n", __func__, __LINE__, "%s:%d lfifo: failed at initial read_lat=%u\n",
gbl->curr_read_lat); __func__, __LINE__, gbl->curr_read_lat);
return 0;
} }
return found_one;
} }
/** /**