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Remove L2 Cache invalidate polling.

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This commit is contained in:
Jon Loeliger 2006-05-19 13:14:15 -05:00
parent f35ec68fb0
commit cccce5d058
1 changed files with 17 additions and 11 deletions
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28
cpu/mpc86xx/cache.S
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@ -28,7 +28,7 @@
* Most of this code is taken from 74xx_7xx/cache.S * Most of this code is taken from 74xx_7xx/cache.S
* and then cleaned up a bit * and then cleaned up a bit
*/ */
/* /*
* Invalidate L1 instruction cache. * Invalidate L1 instruction cache.
*/ */
@ -316,24 +316,30 @@ _GLOBAL(dcache_status)
blr blr
/* /*
* Invalidate L2 cache using L2I and polling L2IP * Invalidate L2 cache using L2I, assume L2 is enabled
*/ */
_GLOBAL(l2cache_invalidate) _GLOBAL(l2cache_invalidate)
sync mfspr r3, l2cr
oris r3, r3, L2CR_L2I@h rlwinm. r3, r3, 0, 0, 0
beq 1f
mfspr r3, l2cr
rlwinm r3, r3, 0, 1, 31
#ifdef CONFIG_ALTIVEC
dssall
#endif
sync sync
mtspr l2cr, r3 mtspr l2cr, r3
sync sync
1: mfspr r3, l2cr
oris r3, r3, L2CR_L2I@h
mtspr l2cr, r3
invl2: invl2:
mfspr r3, l2cr mfspr r3, l2cr
andi. r3, r3, L2CR_L2IP andi. r3, r3, L2CR_L2I@h
bne invl2 bne invl2
/* turn off the global invalidate bit */
mfspr r3, l2cr
rlwinm r3, r3, 0, 11, 9
sync
mtspr l2cr, r3
sync
blr blr
/* /*