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SBC8548: fix address mask to allow 64M flash

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Fix incorrect mask to enable all 64MB of onboard flash.
Previously U-Boot incorrectly mapped only 8MB of flash, this
patch correctly maps all the available flash.

Signed-off-by: Jeremy McNicoll <jeremy.mcnicoll@windriver.com>
This commit is contained in:
Jeremy McNicoll 2008-05-02 16:10:04 -04:00 • committed by Wolfgang Denk
parent 3648085c46
commit ccf1ad535a
1 changed files with 3 additions and 3 deletions
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6
include/configs/sbc8548.h
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@ -148,7 +148,7 @@
* 1111 1111 1000 0000 0110 1110 0110 0101 = ff806e65 OR0 * 1111 1111 1000 0000 0110 1110 0110 0101 = ff806e65 OR0
* *
* OR6: * OR6:
* Addr Mask = 64M = OR6[0:16] = 1111 1100 0000 0000 0 * Addr Mask = 64M = OR6[0:16] = 1111 1000 0000 0000 0
* XAM = OR6[17:18] = 11 * XAM = OR6[17:18] = 11
* CSNT = OR6[20] = 1 * CSNT = OR6[20] = 1
* ACS = half cycle delay = OR6[21:22] = 11 * ACS = half cycle delay = OR6[21:22] = 11
@ -157,7 +157,7 @@
* EAD = use external address latch delay = OR6[31] = 1 * EAD = use external address latch delay = OR6[31] = 1
* *
* 0 4 8 12 16 20 24 28 * 0 4 8 12 16 20 24 28
* 1111 1100 0000 0000 0110 1110 0110 0101 = fc006e65 OR6 * 1111 1000 0000 0000 0110 1110 0110 0101 = f8006e65 OR6
*/ */
#define CFG_BOOT_BLOCK 0xff800000 /* start of 8MB Flash */ #define CFG_BOOT_BLOCK 0xff800000 /* start of 8MB Flash */
@ -167,7 +167,7 @@
#define CFG_BR6_PRELIM 0xfb801801 #define CFG_BR6_PRELIM 0xfb801801
#define CFG_OR0_PRELIM 0xff806e65 #define CFG_OR0_PRELIM 0xff806e65
#define CFG_OR6_PRELIM 0xfc006e65 #define CFG_OR6_PRELIM 0xf8006e65
#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE} #define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE}
#define CFG_MAX_FLASH_BANKS 1 /* number of banks */ #define CFG_MAX_FLASH_BANKS 1 /* number of banks */