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pci: rockchip: Switch to generic-phy

Browse source 
Now, we have a PCIe PHY driver as part of the Generic
PHY framework. Let's use it instead of legacy PHY driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jagan Teki 2020-07-09 23:41:02 +05:30 • committed by Kever Yang
parent 7bdeb4ef4c
commit ce920e0e56
3 changed files with 16 additions and 10 deletions
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1
drivers/pci/Kconfig
View file

@ -200,6 +200,7 @@ config PCIE_MEDIATEK
config PCIE_ROCKCHIP config PCIE_ROCKCHIP
bool "Enable Rockchip PCIe driver" bool "Enable Rockchip PCIe driver"
select DM_PCI select DM_PCI
select PHY_ROCKCHIP_PCIE
default y if ROCKCHIP_RK3399 default y if ROCKCHIP_RK3399
help help
Say Y here if you want to enable PCIe controller support on Say Y here if you want to enable PCIe controller support on

20
drivers/pci/pcie_rockchip.c
View file

@ -159,8 +159,6 @@ static int rockchip_pcie_atr_init(struct rockchip_pcie *priv)
static int rockchip_pcie_init_port(struct udevice *dev) static int rockchip_pcie_init_port(struct udevice *dev)
{ {
struct rockchip_pcie *priv = dev_get_priv(dev); struct rockchip_pcie *priv = dev_get_priv(dev);
struct rockchip_pcie_phy *phy = pcie_get_phy(priv);
struct rockchip_pcie_phy_ops *ops = phy_get_ops(phy);
u32 cr, val, status; u32 cr, val, status;
int ret; int ret;
@ -185,7 +183,7 @@ static int rockchip_pcie_init_port(struct udevice *dev)
return ret; return ret;
} }
ret = ops->init(phy); ret = generic_phy_init(&priv->pcie_phy);
if (ret) { if (ret) {
dev_err(dev, "failed to init phy (ret=%d)\n", ret); dev_err(dev, "failed to init phy (ret=%d)\n", ret);
goto err_exit_phy; goto err_exit_phy;
@ -242,7 +240,7 @@ static int rockchip_pcie_init_port(struct udevice *dev)
cr |= PCIE_CLIENT_CONF_ENABLE | PCIE_CLIENT_MODE_RC; cr |= PCIE_CLIENT_CONF_ENABLE | PCIE_CLIENT_MODE_RC;
writel(cr, priv->apb_base + PCIE_CLIENT_CONFIG); writel(cr, priv->apb_base + PCIE_CLIENT_CONFIG);
ret = ops->power_on(phy); ret = generic_phy_power_on(&priv->pcie_phy);
if (ret) { if (ret) {
dev_err(dev, "failed to power on phy (ret=%d)\n", ret); dev_err(dev, "failed to power on phy (ret=%d)\n", ret);
goto err_power_off_phy; goto err_power_off_phy;
@ -311,9 +309,9 @@ static int rockchip_pcie_init_port(struct udevice *dev)
return 0; return 0;
err_power_off_phy: err_power_off_phy:
ops->power_off(phy); generic_phy_power_off(&priv->pcie_phy);
err_exit_phy: err_exit_phy:
ops->exit(phy); generic_phy_exit(&priv->pcie_phy);
return ret; return ret;
} }
@ -443,6 +441,12 @@ static int rockchip_pcie_parse_dt(struct udevice *dev)
return ret; return ret;
} }
ret = generic_phy_get_by_index(dev, 0, &priv->pcie_phy);
if (ret) {
dev_err(dev, "failed to get pcie-phy (ret=%d)\n", ret);
return ret;
}
return 0; return 0;
} }
@ -460,10 +464,6 @@ static int rockchip_pcie_probe(struct udevice *dev)
if (ret) if (ret)
return ret; return ret;
ret = rockchip_pcie_phy_get(dev);
if (ret)
return ret;
ret = rockchip_pcie_set_vpcie(dev); ret = rockchip_pcie_set_vpcie(dev);
if (ret) if (ret)
return ret; return ret;

5
drivers/pci/pcie_rockchip.h
View file

@ -9,6 +9,8 @@
* *
*/ */
#include <generic-phy.h>
#define HIWORD_UPDATE(mask, val) (((mask) << 16) | (val)) #define HIWORD_UPDATE(mask, val) (((mask) << 16) | (val))
#define HIWORD_UPDATE_BIT(val) HIWORD_UPDATE(val, val) #define HIWORD_UPDATE_BIT(val) HIWORD_UPDATE(val, val)
@ -126,6 +128,9 @@ struct rockchip_pcie {
struct udevice *vpcie3v3; struct udevice *vpcie3v3;
struct udevice *vpcie1v8; struct udevice *vpcie1v8;
struct udevice *vpcie0v9; struct udevice *vpcie0v9;
/* phy */
struct phy pcie_phy;
}; };
int rockchip_pcie_phy_get(struct udevice *dev); int rockchip_pcie_phy_get(struct udevice *dev);