mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-18 21:21:37 +00:00
Merge git://git.denx.de/u-boot-socfpga
This commit is contained in:
commit
d0f30211e9
9 changed files with 28 additions and 8 deletions
|
@ -50,8 +50,8 @@ config SYS_SOC
|
|||
default "socfpga"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5_SOCDK
|
||||
default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5_SOCDK
|
||||
default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
|
||||
default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
|
||||
default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
|
||||
default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
|
||||
default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
SOCFPGA BOARD
|
||||
M: Dinh Nguyen <dinguyen@altera.com>
|
||||
M: Dinh Nguyen <dinguyen@opensource.altera.com>
|
||||
M: Chin-Liang See <clsee@altera.com>
|
||||
S: Maintained
|
||||
F: board/altera/arria5-socdk/
|
||||
F: include/configs/socfpga_arria5.h
|
||||
F: include/configs/socfpga_arria5_socdk.h
|
||||
F: configs/socfpga_arria5_defconfig
|
||||
|
|
|
@ -1,9 +1,9 @@
|
|||
SOCFPGA BOARD
|
||||
M: Dinh Nguyen <dinguyen@altera.com>
|
||||
M: Dinh Nguyen <dinguyen@opensource.altera.com>
|
||||
M: Chin-Liang See <clsee@altera.com>
|
||||
S: Maintained
|
||||
F: board/altera/cyclone5-socdk/
|
||||
F: include/configs/socfpga_cyclone5.h
|
||||
F: include/configs/socfpga_cyclone5_socdk.h
|
||||
F: configs/socfpga_cyclone5_defconfig
|
||||
|
||||
SOCRATES BOARD
|
||||
|
|
|
@ -59,6 +59,10 @@
|
|||
|
||||
#endif
|
||||
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */
|
||||
#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
|
||||
|
||||
/* USB */
|
||||
#ifdef CONFIG_CMD_USB
|
||||
#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
|
|
@ -73,7 +73,6 @@
|
|||
/*
|
||||
* Cache
|
||||
*/
|
||||
#define CONFIG_SYS_ARM_CACHE_WRITEALLOC
|
||||
#define CONFIG_SYS_CACHELINE_SIZE 32
|
||||
#define CONFIG_SYS_L2_PL310
|
||||
#define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS
|
||||
|
@ -282,7 +281,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
|
|||
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
|
||||
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
|
||||
#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
|
||||
#define CONFIG_ENV_IS_NOWHERE
|
||||
#define CONFIG_ENV_SIZE 4096
|
||||
|
||||
/*
|
||||
|
|
|
@ -59,6 +59,10 @@
|
|||
|
||||
#endif
|
||||
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */
|
||||
#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
|
||||
|
||||
/* USB */
|
||||
#ifdef CONFIG_CMD_USB
|
||||
#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
|
|
@ -55,6 +55,10 @@
|
|||
|
||||
#endif
|
||||
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */
|
||||
#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
|
||||
|
||||
/* USB */
|
||||
#ifdef CONFIG_CMD_USB
|
||||
#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
|
||||
|
|
|
@ -43,6 +43,12 @@
|
|||
#define CONFIG_LOADADDR 0x01000000
|
||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
||||
|
||||
/* Environment is in MMC */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */
|
||||
#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
|
||||
|
||||
/* USB */
|
||||
#ifdef CONFIG_CMD_USB
|
||||
#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
|
||||
|
|
|
@ -59,6 +59,10 @@
|
|||
|
||||
#endif
|
||||
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */
|
||||
#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
|
||||
|
||||
/* USB */
|
||||
#ifdef CONFIG_CMD_USB
|
||||
#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
|
||||
|
|
Loading…
Add table
Reference in a new issue