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MX35: Add soc_boot_mode and soc_boot_device to MX35
The functions are required to use the generic SPL Framework. Signed-off-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Stefano Babic
parent
e650030347
commit
d41924a2c1
4 changed files with 206 additions and 0 deletions
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@ -35,6 +35,7 @@
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#include <fsl_esdhc.h>
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#endif
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#include <netdev.h>
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#include <spl.h>
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#define CLK_CODE(arm, ahb, sel) (((arm) << 16) + ((ahb) << 8) + (sel))
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#define CLK_CODE_ARM(c) (((c) >> 16) & 0xFF)
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@ -492,3 +493,77 @@ void reset_cpu(ulong addr)
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struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR;
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writew(4, &wdog->wcr);
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}
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#define RCSR_MEM_CTL_WEIM 0
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#define RCSR_MEM_CTL_NAND 1
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#define RCSR_MEM_CTL_ATA 2
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#define RCSR_MEM_CTL_EXPANSION 3
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#define RCSR_MEM_TYPE_NOR 0
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#define RCSR_MEM_TYPE_ONENAND 2
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#define RCSR_MEM_TYPE_SD 0
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#define RCSR_MEM_TYPE_I2C 2
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#define RCSR_MEM_TYPE_SPI 3
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u32 spl_boot_device(void)
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{
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struct ccm_regs *ccm =
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(struct ccm_regs *)IMX_CCM_BASE;
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u32 rcsr = readl(&ccm->rcsr);
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u32 mem_type, mem_ctl;
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/* In external mode, no boot device is returned */
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if ((rcsr >> 10) & 0x03)
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return BOOT_DEVICE_NONE;
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mem_ctl = (rcsr >> 25) & 0x03;
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mem_type = (rcsr >> 23) & 0x03;
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switch (mem_ctl) {
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case RCSR_MEM_CTL_WEIM:
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switch (mem_type) {
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case RCSR_MEM_TYPE_NOR:
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return BOOT_DEVICE_NOR;
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case RCSR_MEM_TYPE_ONENAND:
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return BOOT_DEVICE_ONE_NAND;
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default:
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return BOOT_DEVICE_NONE;
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}
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case RCSR_MEM_CTL_NAND:
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return BOOT_DEVICE_NAND;
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case RCSR_MEM_CTL_EXPANSION:
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switch (mem_type) {
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case RCSR_MEM_TYPE_SD:
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return BOOT_DEVICE_MMC1;
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case RCSR_MEM_TYPE_I2C:
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return BOOT_DEVICE_I2C;
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case RCSR_MEM_TYPE_SPI:
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return BOOT_DEVICE_SPI;
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default:
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return BOOT_DEVICE_NONE;
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}
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}
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return BOOT_DEVICE_NONE;
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}
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#ifdef CONFIG_SPL_BUILD
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u32 spl_boot_mode(void)
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{
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switch (spl_boot_device()) {
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case BOOT_DEVICE_MMC1:
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#ifdef CONFIG_SPL_FAT_SUPPORT
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return MMCSD_MODE_FAT;
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#else
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return MMCSD_MODE_RAW;
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#endif
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break;
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case BOOT_DEVICE_NAND:
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return 0;
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break;
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default:
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puts("spl: ERROR: unsupported device\n");
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hang();
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}
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}
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#endif
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62
arch/arm/cpu/arm1136/u-boot-spl.lds
Normal file
62
arch/arm/cpu/arm1136/u-boot-spl.lds
Normal file
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@ -0,0 +1,62 @@
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/*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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* Aneesh V <aneesh@ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
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LENGTH = CONFIG_SPL_MAX_SIZE }
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MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
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LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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.text :
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{
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__start = .;
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arch/arm/cpu/arm1136/start.o (.text)
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*(.text*)
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} >.sram
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. = ALIGN(4);
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.rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
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. = ALIGN(4);
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.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
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. = ALIGN(4);
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__image_copy_end = .;
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_end = .;
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.bss :
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{
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. = ALIGN(4);
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__bss_start = .;
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*(.bss*)
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. = ALIGN(4);
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__bss_end__ = .;
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} >.sdram
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}
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31
arch/arm/include/asm/arch-mx35/mmc_host_def.h
Normal file
31
arch/arm/include/asm/arch-mx35/mmc_host_def.h
Normal file
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@ -0,0 +1,31 @@
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/*
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* (C) Copyright 2008
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* Texas Instruments, <www.ti.com>
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* Syed Mohammed Khasim <khasim@ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation's version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef MMC_HOST_DEF_H
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#define MMC_HOST_DEF_H
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/* Driver definitions */
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#define MMCSD_SECTOR_SIZE 512
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#endif /* MMC_HOST_DEF_H */
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38
arch/arm/include/asm/arch-mx35/spl.h
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38
arch/arm/include/asm/arch-mx35/spl.h
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@ -0,0 +1,38 @@
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/*
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* (C) Copyright 2012
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* Texas Instruments, <www.ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _ASM_ARCH_SPL_H_
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#define _ASM_SPL_H_
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#define BOOT_DEVICE_NONE 0
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#define BOOT_DEVICE_XIP 1
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#define BOOT_DEVICE_XIPWAIT 2
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#define BOOT_DEVICE_NAND 3
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#define BOOT_DEVICE_ONE_NAND 4
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#define BOOT_DEVICE_MMC1 5
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#define BOOT_DEVICE_MMC2 6
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#define BOOT_DEVICE_MMC2_2 7
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#define BOOT_DEVICE_NOR 8
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#define BOOT_DEVICE_I2C 9
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#define BOOT_DEVICE_SPI 10
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#endif
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