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PCI: autoconfig: Don't allocate 64-bit addresses to 32-bit only resources

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Currently, if we happen to allocate an address requiring 64 bits to a
device only supporting 32-bit BARs, the address eventually gets silently
truncated to 32 bits. Avoid this by adding a new flag to
pciauto_region_allocate() to bail out in such situations.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Tuomas Tynkkynen 2018-05-14 19:38:13 +03:00 • committed by Tom Rini
parent ed12a89d07
commit d71975ae6e
4 changed files with 14 additions and 6 deletions
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6
drivers/pci/pci_auto.c
View file

@ -98,7 +98,8 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
}
if (!enum_only && pciauto_region_allocate(bar_res, bar_size,
&bar_value) == 0) {
&bar_value,
found_mem64) == 0) {
/* Write it out and update our limit */
dm_pci_write_config32(dev, bar, (u32)bar_value);
@ -140,7 +141,8 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num,
debug("PCI Autoconfig: ROM, size=%#x, ",
(unsigned int)bar_size);
if (pciauto_region_allocate(mem, bar_size,
&bar_value) == 0) {
&bar_value,
false) == 0) {
dm_pci_write_config32(dev, rom_addr,
bar_value);
}

7
drivers/pci/pci_auto_common.c
View file

@ -32,7 +32,7 @@ void pciauto_region_align(struct pci_region *res, pci_size_t size)
}
int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
pci_addr_t *bar)
pci_addr_t *bar, bool supports_64bit)
{
pci_addr_t addr;
@ -48,6 +48,11 @@ int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
goto error;
}
if (upper_32_bits(addr) && !supports_64bit) {
debug("Cannot assign 64-bit address to 32-bit-only resource\n");
goto error;
}
res->bus_lower = addr + size;
debug("address=0x%llx bus_lower=0x%llx\n", (unsigned long long)addr,

5
drivers/pci/pci_auto_old.c
View file

@ -108,7 +108,8 @@ void pciauto_setup_device(struct pci_controller *hose,
}
#ifndef CONFIG_PCI_ENUM_ONLY
if (pciauto_region_allocate(bar_res, bar_size, &bar_value) == 0) {
if (pciauto_region_allocate(bar_res, bar_size,
&bar_value, found_mem64) == 0) {
/* Write it out and update our limit */
pci_hose_write_config_dword(hose, dev, bar, (u32)bar_value);
@ -150,7 +151,7 @@ void pciauto_setup_device(struct pci_controller *hose,
debug("PCI Autoconfig: ROM, size=%#x, ",
(unsigned int)bar_size);
if (pciauto_region_allocate(mem, bar_size,
&bar_value) == 0) {
&bar_value, false) == 0) {
pci_hose_write_config_dword(hose, dev, rom_addr,
bar_value);
}

2
include/pci.h
View file

@ -681,7 +681,7 @@ void pciauto_region_init(struct pci_region *res);
void pciauto_region_align(struct pci_region *res, pci_size_t size);
void pciauto_config_init(struct pci_controller *hose);
int pciauto_region_allocate(struct pci_region *res, pci_size_t size,
pci_addr_t *bar);
pci_addr_t *bar, bool supports_64bit);
#if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT)
extern int pci_hose_read_config_byte_via_dword(struct pci_controller *hose,