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bcm2836 SoC support (used in Raspberry Pi 2 model B)
The bcm2835 and bcm2836 are essentially identical, except: - The CPU is an ARM1176 v.s. a quad-core Cortex-A7. - The physical address of many IO controllers has moved. Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH), update the existing bcm2835 code to handle the minor differences, and plumb it into the ARMv7 CPU architecture. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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7 changed files with 39 additions and 4 deletions
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@ -39,6 +39,7 @@ endif
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obj-$(if $(filter am33xx,$(SOC)),y) += am33xx/
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obj-$(if $(filter armada-xp,$(SOC)),y) += armada-xp/
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obj-$(CONFIG_BCM2835) += bcm2835/
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obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/
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obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/
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obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/
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13
arch/arm/cpu/armv7/bcm2835/Makefile
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13
arch/arm/cpu/armv7/bcm2835/Makefile
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@ -0,0 +1,13 @@
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#
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# (C) Copyright 2012 Stephen Warren
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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src_dir := ../../arm1176/bcm2835/
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obj-y :=
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obj-y += $(src_dir)/init.o
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obj-y += $(src_dir)/reset.o
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obj-y += $(src_dir)/timer.o
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obj-y += $(src_dir)/mbox.o
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@ -1,6 +1,7 @@
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/*
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* Copyright (C) 2012 Vikram Narayananan
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* <vikram186@gmail.com>
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* (C) Copyright 2012,2015 Stephen Warren
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _BCM2835_GPIO_H_
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#define _BCM2835_GPIO_H_
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#ifdef CONFIG_BCM2836
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#define BCM2835_GPIO_BASE 0x3f200000
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#else
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#define BCM2835_GPIO_BASE 0x20200000
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#endif
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#define BCM2835_GPIO_COUNT 54
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#define BCM2835_GPIO_FSEL_MASK 0x7
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@ -1,5 +1,5 @@
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/*
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* (C) Copyright 2012 Stephen Warren
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* (C) Copyright 2012,2015 Stephen Warren
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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@ -38,7 +38,11 @@
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/* Raw mailbox HW */
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#ifdef CONFIG_BCM2836
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#define BCM2835_MBOX_PHYSADDR 0x3f00b880
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#else
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#define BCM2835_MBOX_PHYSADDR 0x2000b880
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#endif
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struct bcm2835_mbox_regs {
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u32 read;
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@ -1,5 +1,5 @@
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/*
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* (C) Copyright 2012 Stephen Warren
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* (C) Copyright 2012,2015 Stephen Warren
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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@ -7,7 +7,11 @@
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#ifndef _BCM2835_SDHCI_H_
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#define _BCM2835_SDHCI_H_
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#ifdef CONFIG_BCM2836
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#define BCM2835_SDHCI_BASE 0x3f300000
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#else
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#define BCM2835_SDHCI_BASE 0x20300000
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#endif
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int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);
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@ -1,5 +1,5 @@
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/*
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* (C) Copyright 2012 Stephen Warren
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* (C) Copyright 2012,2015 Stephen Warren
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _BCM2835_TIMER_H
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#define _BCM2835_TIMER_H
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#ifdef CONFIG_BCM2836
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#define BCM2835_TIMER_PHYSADDR 0x3f003000
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#else
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#define BCM2835_TIMER_PHYSADDR 0x20003000
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#endif
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struct bcm2835_timer_regs {
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u32 cs;
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@ -1,5 +1,5 @@
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/*
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* (C) Copyright 2012 Stephen Warren
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* (C) Copyright 2012,2015 Stephen Warren
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _BCM2835_TIMER_H
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#define _BCM2835_TIMER_H
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#ifdef CONFIG_BCM2836
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#define BCM2835_WDOG_PHYSADDR 0x3f100000
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#else
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#define BCM2835_WDOG_PHYSADDR 0x20100000
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#endif
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struct bcm2835_wdog_regs {
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u32 unknown0[7];
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