mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-21 06:31:31 +00:00
Merge branch 'master' of git://git.denx.de/u-boot-net
This commit is contained in:
Wolfgang Denk
commit
db81c0d276
4 changed files with 58 additions and 30 deletions
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@ -46,8 +46,7 @@ tested on both gig copper and gig fiber boards
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#define TOUT_LOOP 100000
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#undef virt_to_bus
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#define virt_to_bus(x) ((unsigned long)x)
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#define virt_to_bus(devno, v) pci_virt_to_mem(devno, (void *) (v))
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#define bus_to_phys(devno, a) pci_mem_to_phys(devno, a)
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#define mdelay(n) udelay((n)*1000)
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@ -357,7 +356,7 @@ e1000_acquire_eeprom(struct e1000_hw *hw)
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struct e1000_eeprom_info *eeprom = &hw->eeprom;
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uint32_t eecd, i = 0;
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DEBUGOUT();
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DEBUGFUNC();
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if (e1000_swfw_sync_acquire(hw, E1000_SWFW_EEP_SM))
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return -E1000_ERR_SWFW_SYNC;
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@ -418,7 +417,7 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw *hw)
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int32_t ret_val = E1000_SUCCESS;
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uint16_t eeprom_size;
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DEBUGOUT();
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DEBUGFUNC();
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switch (hw->mac_type) {
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case e1000_82542_rev2_0:
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@ -2355,7 +2354,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)
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int32_t ret_val;
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uint16_t phy_data;
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DEBUGOUT();
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DEBUGFUNC();
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if (hw->phy_reset_disable)
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return E1000_SUCCESS;
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@ -5017,7 +5016,7 @@ e1000_transmit(struct eth_device *nic, volatile void *packet, int length)
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txp = tx_base + tx_tail;
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tx_tail = (tx_tail + 1) % 8;
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txp->buffer_addr = cpu_to_le64(virt_to_bus(packet));
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txp->buffer_addr = cpu_to_le64(virt_to_bus(hw->pdev, packet));
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txp->lower.data = cpu_to_le32(hw->txd_cmd | length);
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txp->upper.data = 0;
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E1000_WRITE_REG(hw, TDT, tx_tail);
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@ -5145,6 +5144,8 @@ e1000_initialize(bd_t * bis)
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int idx = 0;
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u32 PciCommandWord;
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DEBUGFUNC();
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while (1) { /* Find PCI device(s) */
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if ((devno = pci_find_devices(supported, idx++)) < 0) {
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break;
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@ -5170,7 +5171,6 @@ e1000_initialize(bd_t * bis)
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hw = (struct e1000_hw *) malloc(sizeof (*hw));
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hw->pdev = devno;
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nic->priv = hw;
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nic->iobase = bus_to_phys(devno, iobase);
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sprintf(nic->name, "e1000#%d", card_number);
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@ -5180,7 +5180,8 @@ e1000_initialize(bd_t * bis)
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hw->autoneg_failed = 0;
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hw->autoneg = 1;
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hw->get_link_status = TRUE;
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hw->hw_addr = (typeof(hw->hw_addr)) iobase;
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hw->hw_addr =
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pci_map_bar(devno, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
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hw->mac_type = e1000_undefined;
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/* MAC and Phy settings */
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@ -38,6 +38,8 @@
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#include <asm/arch/kirkwood.h>
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#include "kirkwood_egiga.h"
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#define KIRKWOOD_PHY_ADR_REQUEST 0xee
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/*
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* smi_reg_read - miiphy_read callback function.
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*
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@ -52,7 +54,8 @@ static int smi_reg_read(char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)
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u32 timeout;
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/* Phyadr read request */
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if (phy_adr == 0xEE && reg_ofs == 0xEE) {
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if (phy_adr == KIRKWOOD_PHY_ADR_REQUEST &&
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reg_ofs == KIRKWOOD_PHY_ADR_REQUEST) {
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/* */
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*data = (u16) (KWGBEREG_RD(regs->phyadr) & PHYADR_MASK);
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return 0;
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@ -127,7 +130,8 @@ static int smi_reg_write(char *devname, u8 phy_adr, u8 reg_ofs, u16 data)
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u32 timeout;
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/* Phyadr write request*/
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if (phy_adr == 0xEE && reg_ofs == 0xEE) {
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if (phy_adr == KIRKWOOD_PHY_ADR_REQUEST &&
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reg_ofs == KIRKWOOD_PHY_ADR_REQUEST) {
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KWGBEREG_WR(regs->phyadr, data);
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return 0;
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}
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@ -396,6 +400,7 @@ static int kwgbe_init(struct eth_device *dev)
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{
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struct kwgbe_device *dkwgbe = to_dkwgbe(dev);
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struct kwgbe_registers *regs = dkwgbe->regs;
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int i;
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/* setup RX rings */
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kwgbe_init_rx_desc_ring(dkwgbe);
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@ -443,12 +448,20 @@ static int kwgbe_init(struct eth_device *dev)
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#if (defined (CONFIG_MII) || defined (CONFIG_CMD_MII)) \
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&& defined (CONFIG_SYS_FAULT_ECHO_LINK_DOWN)
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u16 phyadr;
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miiphy_read(dev->name, 0xEE, 0xEE, &phyadr);
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if (!miiphy_link(dev->name, phyadr)) {
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printf("%s: No link on %s\n", __FUNCTION__, dev->name);
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return -1;
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/* Wait up to 5s for the link status */
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for (i = 0; i < 5; i++) {
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u16 phyadr;
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miiphy_read(dev->name, KIRKWOOD_PHY_ADR_REQUEST,
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KIRKWOOD_PHY_ADR_REQUEST, &phyadr);
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/* Return if we get link up */
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if (miiphy_link(dev->name, phyadr))
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return 0;
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udelay(1000000);
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}
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printf("No link on %s\n", dev->name);
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return -1;
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#endif
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return 0;
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}
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@ -487,18 +500,26 @@ static int kwgbe_send(struct eth_device *dev, volatile void *dataptr,
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struct kwgbe_device *dkwgbe = to_dkwgbe(dev);
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struct kwgbe_registers *regs = dkwgbe->regs;
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struct kwgbe_txdesc *p_txdesc = dkwgbe->p_txdesc;
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void *p = (void *)dataptr;
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u32 cmd_sts;
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/* Copy buffer if it's misaligned */
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if ((u32) dataptr & 0x07) {
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printf("Err..(%s) xmit dataptr not 64bit aligned\n",
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__FUNCTION__);
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return -1;
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if (datasize > PKTSIZE_ALIGN) {
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printf("Non-aligned data too large (%d)\n",
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datasize);
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return -1;
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}
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memcpy(dkwgbe->p_aligned_txbuf, p, datasize);
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p = dkwgbe->p_aligned_txbuf;
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}
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p_txdesc->cmd_sts = KWGBE_ZERO_PADDING | KWGBE_GEN_CRC;
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p_txdesc->cmd_sts |= KWGBE_TX_FIRST_DESC | KWGBE_TX_LAST_DESC;
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p_txdesc->cmd_sts |= KWGBE_BUFFER_OWNED_BY_DMA;
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p_txdesc->cmd_sts |= KWGBE_TX_EN_INTERRUPT;
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p_txdesc->buf_ptr = (u8 *) dataptr;
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p_txdesc->buf_ptr = (u8 *) p;
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p_txdesc->byte_cnt = datasize;
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/* Apply send command using zeroth RXUQ */
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@ -615,8 +636,13 @@ int kirkwood_egiga_initialize(bd_t * bis)
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* PKTSIZE_ALIGN + 1)))
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goto error3;
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if (!(dkwgbe->p_aligned_txbuf = memalign(8, PKTSIZE_ALIGN)))
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goto error4;
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if (!(dkwgbe->p_txdesc = (struct kwgbe_txdesc *)
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memalign(PKTALIGN, sizeof(struct kwgbe_txdesc) + 1))) {
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free(dkwgbe->p_aligned_txbuf);
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error4:
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free(dkwgbe->p_rxbuf);
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error3:
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free(dkwgbe->p_rxdesc);
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@ -670,7 +696,8 @@ int kirkwood_egiga_initialize(bd_t * bis)
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#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
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miiphy_register(dev->name, smi_reg_read, smi_reg_write);
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/* Set phy address of the port */
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miiphy_write(dev->name, 0xEE, 0xEE, PHY_BASE_ADR + devnum);
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miiphy_write(dev->name, KIRKWOOD_PHY_ADR_REQUEST,
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KIRKWOOD_PHY_ADR_REQUEST, PHY_BASE_ADR + devnum);
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#endif
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}
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return 0;
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@ -499,6 +499,7 @@ struct kwgbe_device {
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struct kwgbe_rxdesc *p_rxdesc;
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struct kwgbe_rxdesc *p_rxdesc_curr;
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u8 *p_rxbuf;
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u8 *p_aligned_txbuf;
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};
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#endif /* __EGIGA_H__ */
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@ -356,8 +356,8 @@ uint mii_cr_init(uint mii_reg, struct tsec_private * priv)
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return MIIM_CR_INIT;
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}
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/* Parse the status register for link, and then do
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* auto-negotiation
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/*
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* Wait for auto-negotiation to complete, then determine link
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*/
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uint mii_parse_sr(uint mii_reg, struct tsec_private * priv)
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{
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@ -366,8 +366,7 @@ uint mii_parse_sr(uint mii_reg, struct tsec_private * priv)
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* (ie - we're capable and it's not done)
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*/
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mii_reg = read_phy_reg(priv, MIIM_STATUS);
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if ((mii_reg & MIIM_STATUS_LINK) && (mii_reg & PHY_BMSR_AUTN_ABLE)
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&& !(mii_reg & PHY_BMSR_AUTN_COMP)) {
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if ((mii_reg & PHY_BMSR_AUTN_ABLE) && !(mii_reg & PHY_BMSR_AUTN_COMP)) {
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int i = 0;
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puts("Waiting for PHY auto negotiation to complete");
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@ -388,15 +387,15 @@ uint mii_parse_sr(uint mii_reg, struct tsec_private * priv)
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mii_reg = read_phy_reg(priv, MIIM_STATUS);
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}
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puts(" done\n");
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priv->link = 1;
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/* Link status bit is latched low, read it again */
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mii_reg = read_phy_reg(priv, MIIM_STATUS);
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udelay(500000); /* another 500 ms (results in faster booting) */
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} else {
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if (mii_reg & MIIM_STATUS_LINK)
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priv->link = 1;
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else
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priv->link = 0;
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}
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priv->link = mii_reg & MIIM_STATUS_LINK ? 1 : 0;
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return 0;
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}
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