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rockchip: Fix the configuration for chromebook_jerry

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Various updates did not make it through to this board. Also the instructions
for building a SPI image are no-longer correct. Fix these so that Jerry can
boot to a prompt again.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2015-12-29 05:22:45 -07:00
parent 25525ebe31
commit dd8e42900b
3 changed files with 9 additions and 3 deletions
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4
configs/chromebook_jerry_defconfig
View file

@ -27,7 +27,9 @@ CONFIG_RESET=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_ROCKCHIP_DWMMC=y CONFIG_ROCKCHIP_DWMMC=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y
# CONFIG_PINCTRL_FULL is not set
CONFIG_SPL_PINCTRL=y CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_PINCTRL=y CONFIG_ROCKCHIP_PINCTRL=y
CONFIG_DM_PMIC=y CONFIG_DM_PMIC=y
CONFIG_PMIC_ACT8846=y CONFIG_PMIC_ACT8846=y
@ -41,5 +43,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y
CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_CMD_DHRYSTONE=y CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y CONFIG_ERRNO_STR=y
CONFIG_ROCKCHIP_SPI=y

7
doc/README.rockchip
View file

@ -135,9 +135,10 @@ Booting from SPI
To write an image that boots from SPI flash (e.g. for the Haier Chromebook): To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
./chromebook_jerry/tools/mkimage -n rk3036 -T rkspi -d chromebook_jerry/spl/u-boot-spl-dtb.bin out ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
dd if=spl.bin of=out.bin bs=128K conv=sync -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
cat chromebook_jerry/u-boot-dtb.img out.bin dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
dd if=out.bin of=out.bin.pad bs=4M conv=sync dd if=out.bin of=out.bin.pad bs=4M conv=sync
This converts the SPL image to the required SPI format by adding the Rockchip This converts the SPL image to the required SPI format by adding the Rockchip

1
include/configs/chromebook_jerry.h
View file

@ -13,5 +13,6 @@
#define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPI_FLASH_GIGADEVICE
#endif #endif